diff options
| author | Kevin O'Connor <kevin@koconnor.net> | 2010-09-08 10:53:44 +0000 |
|---|---|---|
| committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-09-08 10:53:44 +0000 |
| commit | 24f83a76ae2608f7df0a11d80537fdc907f1e88c (patch) | |
| tree | 805bddf7a7bcc839b813e54df5486bfcebb607ab /src/cpu | |
| parent | e914b501d25fe5af769a3753a56f7b01fb08ab2c (diff) | |
| download | coreboot-24f83a76ae2608f7df0a11d80537fdc907f1e88c.tar.xz | |
It should not be necessary to read in the rom during CAR setup.
Removing the code preloading reduces the boot time.
Preload code is enabled when doing CARTEST (not exposed
to Kconfig given that it's a pure debugging measure)
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5786 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/via/car/cache_as_ram.inc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/cpu/via/car/cache_as_ram.inc b/src/cpu/via/car/cache_as_ram.inc index eaa4ac9973..4bbefef3cb 100644 --- a/src/cpu/via/car/cache_as_ram.inc +++ b/src/cpu/via/car/cache_as_ram.inc @@ -139,10 +139,12 @@ clear_fixed_var_mtrr_out: xorl $0x5c5c5c5c,%eax rep stosl +#ifdef CARTEST movl REAL_XIP_ROM_BASE, %esi movl %esi, %edi movl $(CONFIG_XIP_ROM_SIZE>>2), %ecx rep lodsl +#endif /* The key point of this CAR code is C7 cache does not turn into * "no fill" mode, which is not compatible with general CAR code. |