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| author | Aaron Durbin <adurbin@chromium.org> | 2013-06-11 16:36:37 -0500 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-07-10 21:45:28 +0200 |
| commit | 32ab283b1086ef53fadcd4be92df6e41c5d06438 (patch) | |
| tree | b6abc67d0383413dc091d8d6d9639916ddf53066 /src/cpu | |
| parent | e221aad27fb860f31be089180d920df9d2243ae2 (diff) | |
| download | coreboot-32ab283b1086ef53fadcd4be92df6e41c5d06438.tar.xz | |
cpu: Add CPU microcode file to cbfs with 16-byte alignment
On x86 there is a 16-byte alignment requirement for the
addresses containing the CPU microcode. The cbfs files
containing the microcode are used in memory-mapped fashion
when loading new mircocode. Therefore, the data payload's
address/offset of a cbfs file in flash dictates the resulting
alignment. Fix this by processing the CPU microcode cbfs
file separately as it uses $(CBFSTOOL) to find the proper
location within the provided rom image.
Change-Id: Ia200d62dbcf7ff1fa59598654718a0b7e178ca4c
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/3663
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/Makefile.inc | 20 |
1 files changed, 14 insertions, 6 deletions
diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc index 09d36ec67e..a860f67752 100644 --- a/src/cpu/Makefile.inc +++ b/src/cpu/Makefile.inc @@ -15,17 +15,17 @@ subdirs-$(CONFIG_CPU_QEMU_X86) += qemu-x86 ## Rules for building the microcode blob in CBFS ################################################################################ +cpu_ucode_cbfs_name = cpu_microcode_blob.bin + # External microcode file, or are we generating one ? ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL), y) -cbfs-files-y += cpu_microcode_blob.bin -cpu_microcode_blob.bin-type = 0x53 -cpu_microcode_blob.bin-file = $(call strip_quotes,$(CONFIG_CPU_MICROCODE_FILE)) +cpu_ucode_cbfs_file = $(call strip_quotes,$(CONFIG_CPU_MICROCODE_FILE)) +cbfs_include_ucode = y endif ifeq ($(CONFIG_CPU_MICROCODE_CBFS_GENERATE), y) -cbfs-files-y += cpu_microcode_blob.bin -cpu_microcode_blob.bin-type = 0x53 -cpu_microcode_blob.bin-file = $(obj)/cpu_microcode_blob.bin +cpu_ucode_cbfs_file = $(obj)/cpu_microcode_blob.bin +cbfs_include_ucode = y endif # In case we have more than one "source" (cough) files containing microcode, we @@ -42,3 +42,11 @@ $(obj)/cpu_microcode_blob.o: $$(cpu_microcode-objs) $(obj)/cpu_microcode_blob.bin: $(obj)/cpu_microcode_blob.o @printf " MICROCODE $(subst $(obj)/,,$(@))\n" $(OBJCOPY) -j .data -O binary $< $@ + +ifeq ($(cbfs_include_ucode),y) +# Add CPU microcode to specified rom image $(1) +add-cpu-microcode-to-cbfs = \ + $(CBFSTOOL) $(1) locate -f $(cpu_ucode_cbfs_file) -n $(cpu_ucode_cbfs_name) -a 16 | xargs $(CBFSTOOL) $(1) add -n $(cpu_ucode_cbfs_name) -f $(cpu_ucode_cbfs_file) -t 0x53 -b +else +add-cpu-microcode-to-cbfs = true +endif |