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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-09-06 15:42:23 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-11-27 10:37:50 +0000 |
commit | 46f04cbb49fbab5854d395edefea5b5f81df572e (patch) | |
tree | 21f53019188bff1ee980ae8b7ed68ecdf0bb97ed /src/cpu | |
parent | b81731d9dbe067097388212c138e2bed88ce75d4 (diff) | |
download | coreboot-46f04cbb49fbab5854d395edefea5b5f81df572e.tar.xz |
binaryPI: Drop BINARYPI_LEGACY_WRAPPER support
Drop all the sources that were guarded with this.
Change-Id: I6c6fd19875cb57f0caf42a1a94f59efed83bfe0d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/19275
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/amd/pi/Kconfig | 4 | ||||
-rw-r--r-- | src/cpu/amd/pi/Makefile.inc | 6 | ||||
-rw-r--r-- | src/cpu/amd/pi/amd_late_init.c | 36 | ||||
-rw-r--r-- | src/cpu/amd/pi/romstage.c | 55 |
4 files changed, 0 insertions, 101 deletions
diff --git a/src/cpu/amd/pi/Kconfig b/src/cpu/amd/pi/Kconfig index d2824f2503..d18f873332 100644 --- a/src/cpu/amd/pi/Kconfig +++ b/src/cpu/amd/pi/Kconfig @@ -26,15 +26,11 @@ config CPU_AMD_PI select UDELAY_LAPIC select LAPIC_MONOTONIC_TIMER select SPI_FLASH if HAVE_ACPI_RESUME - select CAR_GLOBAL_MIGRATION if BINARYPI_LEGACY_WRAPPER select SMM_ASEG select NO_FIXED_XIP_ROM_SIZE if CPU_AMD_PI -config BINARYPI_LEGACY_WRAPPER - def_bool n - config UDELAY_LAPIC_FIXED_FSB int default 200 diff --git a/src/cpu/amd/pi/Makefile.inc b/src/cpu/amd/pi/Makefile.inc index 0a9b0649a9..6b6447c877 100644 --- a/src/cpu/amd/pi/Makefile.inc +++ b/src/cpu/amd/pi/Makefile.inc @@ -14,9 +14,3 @@ subdirs-$(CONFIG_CPU_AMD_PI_00630F01) += 00630F01 subdirs-$(CONFIG_CPU_AMD_PI_00730F01) += 00730F01 subdirs-$(CONFIG_CPU_AMD_PI_00660F01) += 00660F01 - -ifeq ($(CONFIG_BINARYPI_LEGACY_WRAPPER), y) -cpu_incs-y += $(src)/drivers/amd/agesa/cache_as_ram.S -romstage-y += romstage.c -ramstage-y += amd_late_init.c -endif diff --git a/src/cpu/amd/pi/amd_late_init.c b/src/cpu/amd/pi/amd_late_init.c deleted file mode 100644 index 46144c6fbb..0000000000 --- a/src/cpu/amd/pi/amd_late_init.c +++ /dev/null @@ -1,36 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <arch/acpi.h> -#include <bootstate.h> -#include <device/device.h> -#include <device/pci_def.h> - -#include <northbridge/amd/pi/agesawrapper.h> -#include <northbridge/amd/pi/agesawrapper_call.h> - -static void agesawrapper_post_device(void *unused) -{ - if (acpi_is_wakeup_s3()) - return; - - AGESAWRAPPER(amdinitlate); - - if (!acpi_s3_resume_allowed()) - return; - - AGESAWRAPPER(amdS3Save); -} - -BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, - agesawrapper_post_device, NULL); diff --git a/src/cpu/amd/pi/romstage.c b/src/cpu/amd/pi/romstage.c deleted file mode 100644 index cac5664697..0000000000 --- a/src/cpu/amd/pi/romstage.c +++ /dev/null @@ -1,55 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <arch/cpu.h> -#include <cbmem.h> -#include <cpu/amd/car.h> -#include <cpu/x86/mtrr.h> -#include <console/console.h> -#include <program_loading.h> -#include <romstage_handoff.h> -#include <northbridge/amd/agesa/agesa_helper.h> -#include <northbridge/amd/agesa/state_machine.h> - -void asmlinkage early_all_cores(void) -{ - amd_initmmio(); -} - -void *asmlinkage romstage_main(unsigned long bist) -{ - int s3resume = 0; - u8 initial_apic_id = cpuid_ebx(1) >> 24; - - /* Only BSP returns from here. */ - cache_as_ram_main(bist, initial_apic_id); - - cbmem_recovery(s3resume); - - romstage_handoff_init(s3resume); - - char *stack_top = cbmem_add(CBMEM_ID_ROMSTAGE_RAM_STACK, HIGH_ROMSTAGE_STACK_SIZE); - stack_top += HIGH_ROMSTAGE_STACK_SIZE; - - printk(BIOS_DEBUG, "Move CAR stack.\n"); - return (void *)stack_top; -} - -void asmlinkage romstage_after_car(void) -{ - printk(BIOS_DEBUG, "CAR disabled.\n"); - - agesa_postcar(NULL); - - run_ramstage(); -} |