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authorJulius Werner <jwerner@chromium.org>2019-12-02 22:03:27 -0800
committerPatrick Georgi <pgeorgi@google.com>2019-12-04 14:11:17 +0000
commit55009af42c39f413c49503670ce9bc2858974962 (patch)
tree099e9728bfe8066999de4d7a30021eb10bd71d12 /src/cpu
parent1c371572188a90ea16275460dd4ab6bf9966350b (diff)
downloadcoreboot-55009af42c39f413c49503670ce9bc2858974962.tar.xz
Change all clrsetbits_leXX() to clrsetbitsXX()
This patch changes all existing instances of clrsetbits_leXX() to the new endian-independent clrsetbitsXX(), after double-checking that they're all in SoC-specific code operating on CPU registers and not actually trying to make an endian conversion. This patch was created by running sed -i -e 's/\([cs][le][rt]bits\)_le\([136][624]\)/\1\2/g' across the codebase and cleaning up formatting a bit. Change-Id: I7fc3e736e5fe927da8960fdcd2aae607b62b5ff4 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37433 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/ti/am335x/gpio.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/ti/am335x/gpio.c b/src/cpu/ti/am335x/gpio.c
index 0b3eae815c..5e3b62a34f 100644
--- a/src/cpu/ti/am335x/gpio.c
+++ b/src/cpu/ti/am335x/gpio.c
@@ -45,7 +45,7 @@ int gpio_direction_input(unsigned int gpio)
if (!regs)
return -1;
- setbits_le32(&regs->oe, bit);
+ setbits32(&regs->oe, bit);
return 0;
}
@@ -60,7 +60,7 @@ int gpio_direction_output(unsigned int gpio, int value)
write32(&regs->setdataout, bit);
else
write32(&regs->cleardataout, bit);
- clrbits_le32(&regs->oe, bit);
+ clrbits32(&regs->oe, bit);
return 0;
}