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authorBruce Griffith <bruce.griffith@se-eng.com>2013-08-12 01:53:13 -0600
committerBruce Griffith <Bruce.Griffith@se-eng.com>2013-08-16 11:20:05 +0200
commit59c3a0615498b6fa79bb4152deab7e837f7ed389 (patch)
treea8c334fcabcc540ea661cfd34ff40a8d5809f286 /src/cpu
parent540d8eaac975e1036ebc269df89316c705efbd3c (diff)
downloadcoreboot-59c3a0615498b6fa79bb4152deab7e837f7ed389.tar.xz
AMD AGESA: Remove INVD instruction when transitioning from CAR
The AMD AGESA function to move the stack from cache-as-ram to actual RAM doesn't need any help. The current implementation has an INVD instruction just before cache-as-RAM is torn down. It isn't needed for Trinity processors and makes Kabini boot unreliable. Change-Id: Ibe9e4105eee032471ccbb2d537471d5fa5847d22 Signed-off-by: Bruce Griffith <bruce.griffith@se-eng.com> Reviewed-on: http://review.coreboot.org/3852 Tested-by: build bot (Jenkins) Reviewed-by: Siyuan Wang <wangsiyuanbuaa@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/cpu')
-rwxr-xr-xsrc/cpu/amd/agesa/cache_as_ram.inc5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/cpu/amd/agesa/cache_as_ram.inc b/src/cpu/amd/agesa/cache_as_ram.inc
index c645a1e517..449cf693f2 100755
--- a/src/cpu/amd/agesa/cache_as_ram.inc
+++ b/src/cpu/amd/agesa/cache_as_ram.inc
@@ -85,6 +85,7 @@ stop:
disable_cache_as_ram:
/* Save return stack */
+ movd 0(%esp), %xmm1
movd %esp, %xmm0
/* Disable cache */
@@ -92,8 +93,6 @@ disable_cache_as_ram:
orl $CR0_CacheDisable, %eax
movl %eax, %cr0
- invd
-
AMD_DISABLE_STACK
/* enable cache */
@@ -103,7 +102,9 @@ disable_cache_as_ram:
xorl %eax, %eax
/* Restore the return stack */
+ wbinvd
movd %xmm0, %esp
+ movd %xmm1, (%esp)
ret
cache_as_ram_setup_out: