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authorKyösti Mälkki <kyosti.malkki@gmail.com>2017-09-01 07:10:56 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2017-09-08 03:26:55 +0000
commit65e54662e35508623505e1d01c23c6c5caf7e2de (patch)
treeac3f506b8e8962243962b8afd2601e84a719aec6 /src/cpu
parentf8e9449df084d0ccd1a98e756b37343e509c6b67 (diff)
downloadcoreboot-65e54662e35508623505e1d01c23c6c5caf7e2de.tar.xz
intel/car: Fix stack guard placement
Make sure guard placement is above CAR region. Change-Id: I780cdc0b2a549e7ac4b23b0870619f5648a644e7 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/21313 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/intel/car/romstage.c17
1 files changed, 14 insertions, 3 deletions
diff --git a/src/cpu/intel/car/romstage.c b/src/cpu/intel/car/romstage.c
index 14776126c8..555c3846b4 100644
--- a/src/cpu/intel/car/romstage.c
+++ b/src/cpu/intel/car/romstage.c
@@ -15,6 +15,7 @@
#include <console/console.h>
#include <cpu/intel/romstage.h>
#include <cpu/x86/mtrr.h>
+#include <arch/symbols.h>
#include <program_loading.h>
#define DCACHE_RAM_ROMSTAGE_STACK_SIZE 0x2000
@@ -25,9 +26,19 @@ asmlinkage void *romstage_main(unsigned long bist)
void *romstage_stack_after_car;
const int num_guards = 4;
const u32 stack_guard = 0xdeadbeef;
- u32 *stack_base = (void *)(CONFIG_DCACHE_RAM_BASE +
- CONFIG_DCACHE_RAM_SIZE -
- DCACHE_RAM_ROMSTAGE_STACK_SIZE);
+ u32 *stack_base;
+ u32 size;
+
+ /* Size of unallocated CAR. */
+ size = _car_region_end - _car_relocatable_data_end;
+ size = ALIGN_DOWN(size, 16);
+
+ size = MIN(size, DCACHE_RAM_ROMSTAGE_STACK_SIZE);
+ if (size < DCACHE_RAM_ROMSTAGE_STACK_SIZE)
+ printk(BIOS_DEBUG, "Romstage stack size limited to 0x%x!\n",
+ size);
+
+ stack_base = (u32 *) (_car_region_end - size);
for (i = 0; i < num_guards; i++)
stack_base[i] = stack_guard;