diff options
author | Stefan Reinauer <stepan@coresystems.de> | 2010-02-22 06:09:43 +0000 |
---|---|---|
committer | Stefan Reinauer <stepan@openbios.org> | 2010-02-22 06:09:43 +0000 |
commit | de3206a7bebce99f11e753164cc4d46357bba96a (patch) | |
tree | 9843d883940e372dd357b1357ecd7eaba3e3365f /src/cpu | |
parent | d650e9934ff8da9b9cb69e42e642c0ee6d390bf6 (diff) | |
download | coreboot-de3206a7bebce99f11e753164cc4d46357bba96a.tar.xz |
This is a general cleanup patch
- drop include/part and move files to include/
- get rid lots of warnings
- make resource allocator happy with w83627thg
- trivial cbmem resume fix
- fix payload and log level settings in abuild
- fix kontron mptable for virtual wire mode
- drop some dead includes and dead code.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5136 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/intel/model_6ex/cache_as_ram_disable.c | 3 | ||||
-rw-r--r-- | src/cpu/intel/model_6fx/cache_as_ram_disable.c | 2 | ||||
-rw-r--r-- | src/cpu/x86/car/copy_and_run.c | 27 |
3 files changed, 25 insertions, 7 deletions
diff --git a/src/cpu/intel/model_6ex/cache_as_ram_disable.c b/src/cpu/intel/model_6ex/cache_as_ram_disable.c index fcdd3f2e19..6dac367c4d 100644 --- a/src/cpu/intel/model_6ex/cache_as_ram_disable.c +++ b/src/cpu/intel/model_6ex/cache_as_ram_disable.c @@ -54,8 +54,7 @@ void stage1_main(unsigned long bist) real_main(bist); /* No servicable parts below this line .. */ - -#if CAR_DEBUG +#ifdef CAR_DEBUG /* Check value of esp to verify if we have enough rom for stack in Cache as RAM */ unsigned v_esp; __asm__ volatile ( diff --git a/src/cpu/intel/model_6fx/cache_as_ram_disable.c b/src/cpu/intel/model_6fx/cache_as_ram_disable.c index fcdd3f2e19..9af667d655 100644 --- a/src/cpu/intel/model_6fx/cache_as_ram_disable.c +++ b/src/cpu/intel/model_6fx/cache_as_ram_disable.c @@ -55,7 +55,7 @@ void stage1_main(unsigned long bist) /* No servicable parts below this line .. */ -#if CAR_DEBUG +#ifdef CAR_DEBUG /* Check value of esp to verify if we have enough rom for stack in Cache as RAM */ unsigned v_esp; __asm__ volatile ( diff --git a/src/cpu/x86/car/copy_and_run.c b/src/cpu/x86/car/copy_and_run.c index 1c109a3c7d..602e77632d 100644 --- a/src/cpu/x86/car/copy_and_run.c +++ b/src/cpu/x86/car/copy_and_run.c @@ -1,8 +1,27 @@ -/* Copyright (C) 2009 coresystems GmbH - (Written by Patrick Georgi <patrick.georgi@coresystems.de> for coresystems GmbH -*/ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2009-2010 coresystems GmbH + * Written by Patrick Georgi <patrick.georgi@coresystems.de> + * for coresystems GmbH + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + */ -void cbfs_and_run_core(char*, unsigned ebp); +void cbfs_and_run_core(const char *, unsigned ebp); static void copy_and_run(unsigned cpu_reset) { |