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authorRonald G. Minnich <rminnich@gmail.com>2006-06-08 14:19:49 +0000
committerRonald G. Minnich <rminnich@gmail.com>2006-06-08 14:19:49 +0000
commit890ee09a3224f1cfc832f7c8f03e6c2f076aeb20 (patch)
treea4ca05970f66b3c9470bfdb92d0c5ffc174500e6 /src/cpu
parent192b7bc44570f7b4268141f81ffca7a6b5f6fe21 (diff)
downloadcoreboot-890ee09a3224f1cfc832f7c8f03e6c2f076aeb20.tar.xz
further development of OLPC. Set vsm size to 35k. add PCI IRQ for USB.
Set linuxbios size to 28k. Drop debug level to 8. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2315 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/amd/model_gx2/vsmsetup.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/amd/model_gx2/vsmsetup.c b/src/cpu/amd/model_gx2/vsmsetup.c
index 4b35ad570f..cd734f6fdb 100644
--- a/src/cpu/amd/model_gx2/vsmsetup.c
+++ b/src/cpu/amd/model_gx2/vsmsetup.c
@@ -353,7 +353,7 @@ void do_vsmbios(void)
//rom = 0xfff80000;
//rom = 0xfffc0000;
/* the VSA starts at the base of rom - 64 */
- rom = ((unsigned long) 0) - (ROM_SIZE + 64*1024);
+ rom = ((unsigned long) 0) - (ROM_SIZE + 35*1024);
buf = (unsigned char *) 0x60000;
unrv2b((uint8_t *)rom, buf);