diff options
| author | Jonathan Zhang <jonzhang@fb.com> | 2020-10-23 15:20:22 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-10-27 06:13:32 +0000 |
| commit | 8f594b7319c395bc09c711de05ff53f181c0c43d (patch) | |
| tree | 7fcec103851afb02ad3a956c3e4675448605a0d9 /src/cpu | |
| parent | bd21476f99785b83f45ad4ec02ed4e140505f912 (diff) | |
| download | coreboot-8f594b7319c395bc09c711de05ff53f181c0c43d.tar.xz | |
cpu/x86/mtrr: fix OVERFLOW_BEFORE_WIDEN
Integer handling issues:
Potentially overflowing expression "1 << size_msb" with type "int"
(32 bits, signed) is evaluated using 32-bit arithmetic, and then
used in a context that expects an expression of type "uint64_t"
(64 bits, unsigned).
Fixes: CID 1435825 and 1435826
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: If859521b44d9ec3ea744c751501b75d24e3b69e8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46711
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/x86/mtrr/mtrr.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c index 284a1139ab..cb7ecdc963 100644 --- a/src/cpu/x86/mtrr/mtrr.c +++ b/src/cpu/x86/mtrr/mtrr.c @@ -484,9 +484,9 @@ static void calc_var_mtrr_range(struct var_mtrr_state *var_state, * size. The maximum size is calculated by a function of the * min base bit set and maximum size bit set. */ if (addr_lsb > size_msb) - mtrr_size = 1 << size_msb; + mtrr_size = 1ULL << size_msb; else - mtrr_size = 1 << addr_lsb; + mtrr_size = 1ULL << addr_lsb; if (var_state->prepare_msrs) prep_var_mtrr(var_state, base, mtrr_size, mtrr_type); |