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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-05-24 09:06:03 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-05-26 19:14:38 +0200 |
commit | 90a54b087419faf15bef27f5dbd57e79de667f99 (patch) | |
tree | 0c2d733c5a01d821e0796bb3082c495ec3411dfa /src/cpu | |
parent | 7138ee445c713867edd67c20fef10444f7aea6d1 (diff) | |
download | coreboot-90a54b087419faf15bef27f5dbd57e79de667f99.tar.xz |
AGESA: Move S3 related SPI writes again
This is more agesawrapper-related code than CPU.
Change-Id: I3058ef965a83aed1972e02f0f566f81d5dbd7adf
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/10295
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/amd/agesa/Makefile.inc | 1 | ||||
-rw-r--r-- | src/cpu/amd/agesa/s3_resume.c | 35 | ||||
-rw-r--r-- | src/cpu/amd/agesa/s3_resume.h | 3 | ||||
-rw-r--r-- | src/cpu/amd/agesa/spi.c | 49 |
4 files changed, 3 insertions, 85 deletions
diff --git a/src/cpu/amd/agesa/Makefile.inc b/src/cpu/amd/agesa/Makefile.inc index df93f3d50c..de4aafa2ce 100644 --- a/src/cpu/amd/agesa/Makefile.inc +++ b/src/cpu/amd/agesa/Makefile.inc @@ -26,7 +26,6 @@ subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY16_KB) += family16kb romstage-y += s3_resume.c ramstage-y += s3_resume.c -ramstage-$(CONFIG_SPI_FLASH) += spi.c cpu_incs += $(src)/cpu/amd/agesa/cache_as_ram.inc diff --git a/src/cpu/amd/agesa/s3_resume.c b/src/cpu/amd/agesa/s3_resume.c index 15a9ee4414..2ba684650a 100644 --- a/src/cpu/amd/agesa/s3_resume.c +++ b/src/cpu/amd/agesa/s3_resume.c @@ -34,40 +34,6 @@ #include <northbridge/amd/agesa/BiosCallOuts.h> #include "s3_resume.h" -/* The size needs to be 4k aligned, which is the sector size of most flashes. */ -#define S3_DATA_VOLATILE_SIZE 0x6000 -#define S3_DATA_MTRR_SIZE 0x1000 -#define S3_DATA_NONVOLATILE_SIZE 0x1000 - -#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) && \ - (S3_DATA_VOLATILE_SIZE + S3_DATA_MTRR_SIZE + S3_DATA_NONVOLATILE_SIZE) > CONFIG_S3_DATA_SIZE -#error "Please increase the value of S3_DATA_SIZE" -#endif - -static void get_s3nv_data(S3_DATA_TYPE S3DataType, u32 *pos, u32 *len) -{ - /* FIXME: Find file from CBFS. */ - u32 s3_data = CONFIG_S3_DATA_POS; - - switch (S3DataType) { - case S3DataTypeVolatile: - *pos = s3_data; - *len = S3_DATA_VOLATILE_SIZE; - break; - case S3DataTypeMTRR: - *pos = s3_data + S3_DATA_VOLATILE_SIZE; - *len = S3_DATA_MTRR_SIZE; - break; - case S3DataTypeNonVolatile: - *pos = s3_data + S3_DATA_VOLATILE_SIZE + S3_DATA_MTRR_SIZE; - *len = S3_DATA_NONVOLATILE_SIZE; - break; - default: - *pos = 0; - *len = 0; - break; - } -} void restore_mtrr(void) { @@ -173,6 +139,7 @@ static void move_stack_high_mem(void) #ifndef __PRE_RAM__ /* FIXME: Why store MTRR in SPI, just use CBMEM ? */ +#define S3_DATA_MTRR_SIZE 0x1000 static u8 mtrr_store[S3_DATA_MTRR_SIZE]; static void write_mtrr(u8 **p_nvram_pos, unsigned idx) diff --git a/src/cpu/amd/agesa/s3_resume.h b/src/cpu/amd/agesa/s3_resume.h index d7b3b89e78..79f6f1bac4 100644 --- a/src/cpu/amd/agesa/s3_resume.h +++ b/src/cpu/amd/agesa/s3_resume.h @@ -33,6 +33,7 @@ u32 OemAgesaSaveS3Info (S3_DATA_TYPE S3DataType, u32 DataSize, void *Data); void OemAgesaGetS3Info (S3_DATA_TYPE S3DataType, u32 *DataSize, void **Data); void OemAgesaSaveMtrr (void); -void spi_SaveS3info(u32 pos, u32 size, u8 *buf, u32 len); +void get_s3nv_data(S3_DATA_TYPE S3DataType, u32 *pos, u32 *len); +int spi_SaveS3info(u32 pos, u32 size, u8 *buf, u32 len); #endif diff --git a/src/cpu/amd/agesa/spi.c b/src/cpu/amd/agesa/spi.c deleted file mode 100644 index 05a29d7e5d..0000000000 --- a/src/cpu/amd/agesa/spi.c +++ /dev/null @@ -1,49 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2012 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc. - */ - -#include <console/console.h> -#include <spi-generic.h> -#include <spi_flash.h> - -#include "s3_resume.h" - -void spi_SaveS3info(u32 pos, u32 size, u8 *buf, u32 len) -{ - struct spi_flash *flash; - - spi_init(); - flash = spi_flash_probe(0, 0); - if (!flash) { - printk(BIOS_DEBUG, "Could not find SPI device\n"); - /* Dont make flow stop. */ - return; - } - - flash->spi->rw = SPI_WRITE_FLAG; - spi_claim_bus(flash->spi); - - flash->erase(flash, pos, size); - flash->write(flash, pos, sizeof(len), &len); - flash->write(flash, pos + sizeof(len), len, buf); - - flash->spi->rw = SPI_WRITE_FLAG; - spi_release_bus(flash->spi); - - return; -} |