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authorDavid Hendricks <dhendrix@chromium.org>2012-12-31 17:28:43 -0800
committerRonald G. Minnich <rminnich@gmail.com>2013-01-04 01:36:27 +0100
commit6a503b6a0f08bf4236c4c37d75c67182a7af4b02 (patch)
tree79aaedcb8283cb543fe47072c839de6f22354d7f /src/cpu
parent10c90d31264b5698320a1ac2666823532d110258 (diff)
downloadcoreboot-6a503b6a0f08bf4236c4c37d75c67182a7af4b02.tar.xz
make early serial console support more generic
This patch makes pre-RAM serial init more generic, particularly for platforms which do not necessarily need cache-as-RAM in order to use the serial console and do not have a standard 8250 serial port. This adds a Kconfig variable to set romstage-* for very early serial console init. The current method assumes that cache-as-RAM should enable this, so to maintain compatibility selecting CACHE_AS_RAM will also select EARLY_SERIAL_CONSOLE. The UART code structure needs some rework, but the use of ROMCC, romstage, and then ramstage makes things complex. uart.h now includes all .h files for all uarts. All 2 of them. This is actually a simplifying change. Change-Id: I089e7af633c227baf3c06c685f005e9d0e4b38ce Signed-off-by: David Hendricks <dhendrix@chromium.org> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2086 Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/Kconfig1
-rw-r--r--src/cpu/samsung/Kconfig1
-rw-r--r--src/cpu/samsung/exynos5250/uart.c6
-rw-r--r--src/cpu/samsung/exynos5250/uart.h1
4 files changed, 6 insertions, 3 deletions
diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig
index 383ba796a2..ddc46cf393 100644
--- a/src/cpu/Kconfig
+++ b/src/cpu/Kconfig
@@ -16,6 +16,7 @@ source src/cpu/x86/Kconfig
config CACHE_AS_RAM
bool
+ select EARLY_SERIAL_CONSOLE
default !ROMCC
config DCACHE_RAM_BASE
diff --git a/src/cpu/samsung/Kconfig b/src/cpu/samsung/Kconfig
index 4a09ca3cdb..abfc0494e6 100644
--- a/src/cpu/samsung/Kconfig
+++ b/src/cpu/samsung/Kconfig
@@ -5,6 +5,7 @@ config CPU_SAMSUNG_EXYNOS
config CPU_SAMSUNG_EXYNOS5
depends on ARCH_ARMV7
select CPU_SAMSUNG_EXYNOS
+ select EARLY_SERIAL_CONSOLE
bool
default n
diff --git a/src/cpu/samsung/exynos5250/uart.c b/src/cpu/samsung/exynos5250/uart.c
index 3d43976b6d..2d7bf38628 100644
--- a/src/cpu/samsung/exynos5250/uart.c
+++ b/src/cpu/samsung/exynos5250/uart.c
@@ -23,6 +23,7 @@
//#include <common.h>
//#include <linux/compiler.h>
+#include <types.h>
#include <uart.h>
#include <arch/io.h>
//#include <asm/arch-exynos/spl.h>
@@ -34,7 +35,6 @@
#include <cpu/samsung/exynos5-common/exynos5-common.h>
#include <cpu/samsung/exynos5250/clk.h>
-#include <cpu/samsung/exynos5250/uart.h>
#define RX_FIFO_COUNT_MASK 0xff
#define RX_FIFO_FULL_MASK (1 << 8)
@@ -218,12 +218,12 @@ static const struct console_driver exynos5_uart_console __console = {
//unsigned char (*uart_rx_byte)(unsigned base_port) = exynos5_uart_rx_byte;
//void (*uart_tx_byte)(unsigned base_port, unsigned char data) = exynos5_uart_tx_byte;
/* FIXME: trivial wrappers */
-void uart_init()
+void uart_init(void)
{
exynos5_init_dev();
}
-unsigned char uart_rx_byte()
+unsigned char uart_rx_byte(void)
{
return exynos5_uart_rx_byte();
}
diff --git a/src/cpu/samsung/exynos5250/uart.h b/src/cpu/samsung/exynos5250/uart.h
index 8190c67cde..033d605314 100644
--- a/src/cpu/samsung/exynos5250/uart.h
+++ b/src/cpu/samsung/exynos5250/uart.h
@@ -68,4 +68,5 @@ static inline int s5p_uart_divslot(void)
return 0;
}
+void uart_init(void);
#endif