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author | Greg Watson <jarrah@users.sourceforge.net> | 2004-01-22 00:04:58 +0000 |
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committer | Greg Watson <jarrah@users.sourceforge.net> | 2004-01-22 00:04:58 +0000 |
commit | 7a186938b0e6ea484ee87008c0e353bae8593261 (patch) | |
tree | a1d7d468fae419239bf7c499807abe7dfdb270b9 /src/cpu | |
parent | 47624a8e1356fa0f60641bc71f9e096db133820f (diff) | |
download | coreboot-7a186938b0e6ea484ee87008c0e353bae8593261.tar.xz |
clear IR & DR and enable FP
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1346 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/ppc/mpc74xx/mpc74xx.inc | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/src/cpu/ppc/mpc74xx/mpc74xx.inc b/src/cpu/ppc/mpc74xx/mpc74xx.inc index 3391b28a44..55e290dbe9 100644 --- a/src/cpu/ppc/mpc74xx/mpc74xx.inc +++ b/src/cpu/ppc/mpc74xx/mpc74xx.inc @@ -28,16 +28,23 @@ #define BSP_IOMASK2 BAT_BL_64M | BAT_VALID_SUPERVISOR | BAT_VALID_USER isync + sync /* - * Disable dcache and MMU, so we're in a known state + * Disable dcache and MMU + * Clear IR & DR + * Enable FP */ li r0, 0 - sync mtspr HID0, r0 - sync - mtmsr r0 + sync + mfmsr r3 + li r4, 0x0030 /* IR & DR */ + andc r3, r3, r4 + ori r3, r3, 0x2000 /* FP */ + mtmsr r3 isync + sync /* * Invalidate D & I BATS |