diff options
| author | Eric Biederman <ebiederm@xmission.com> | 2003-06-17 08:42:17 +0000 |
|---|---|---|
| committer | Eric Biederman <ebiederm@xmission.com> | 2003-06-17 08:42:17 +0000 |
| commit | 8d9c123812492a80a43112c8dd217fcfb3cee2c5 (patch) | |
| tree | 0bc841279e289f958d85cc8f2873b42770ecbce1 /src/cpu | |
| parent | f96a810f11681ba436b446e9451e02cffcd525f5 (diff) | |
| download | coreboot-8d9c123812492a80a43112c8dd217fcfb3cee2c5.tar.xz | |
- Minor mod to reset16.inc to work with newer binutils hopefully this works with older ones...
- Update apic.h to include the APIC_TASK_PRI register definition
- Update mptable.c to have a reasonable board OEM and productid
- Additional testfiles for romcc.
- Split out auto.c and early failover.c moving their generic bits elsewere
- Enable cache of the rom
- Fixes to amd8111_lpc.c so that we successfully setup virtual wire mode on the ioapic
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@880 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/i386/reset16.inc | 2 | ||||
| -rw-r--r-- | src/cpu/k8/earlymtrr.inc | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/i386/reset16.inc b/src/cpu/i386/reset16.inc index 7c911d9ff2..190b75a32d 100644 --- a/src/cpu/i386/reset16.inc +++ b/src/cpu/i386/reset16.inc @@ -13,7 +13,7 @@ EXT(reset_vector): * other assemblers to tell it where the segment registers * are pointing in memory right now. */ - jmp EXT(_start_offset) + jmp EXT(_start) #elif (_ROMBASE < 0x100000) ljmp $((_ROMBASE & 0xf0000)>>4),$EXT(_start_offset); #else diff --git a/src/cpu/k8/earlymtrr.inc b/src/cpu/k8/earlymtrr.inc index 903405bdfb..d14afb1a31 100644 --- a/src/cpu/k8/earlymtrr.inc +++ b/src/cpu/k8/earlymtrr.inc @@ -46,7 +46,7 @@ set_var_mtrr: wrmsr #if defined(XIP_ROM_SIZE) && defined(XIP_ROM_BASE) - /* enable write back cachine so we can do execute in place + /* enable write base caching so we can do execute in place * on the flash rom. */ movl $0x202, %ecx |