diff options
| author | Xavi Drudis Ferran <xdrudis@tinet.cat> | 2010-08-22 19:59:27 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-08-22 19:59:27 +0000 |
| commit | aa81b69bfdaeb88899851a15acab289519e6edd1 (patch) | |
| tree | 6ed73b33b87e160b98cb3e0b1b177e0bf104a15a /src/cpu | |
| parent | 4a43b7d2bb06081b0f3dd55d4be0d671ccf401dd (diff) | |
| download | coreboot-aa81b69bfdaeb88899851a15acab289519e6edd1.tar.xz | |
RB_C3 should also apply the workaround for errata 354, according to
Revision Guide for AMD Family10h processors (#41322) rev 3.74 June 2010
Signed-off-by: Xavi Drudis Ferran <xdrudis@tinet.cat>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5735 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/amd/model_10xxx/defaults.h | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/src/cpu/amd/model_10xxx/defaults.h b/src/cpu/amd/model_10xxx/defaults.h index e01316c279..7bf9ccb52d 100644 --- a/src/cpu/amd/model_10xxx/defaults.h +++ b/src/cpu/amd/model_10xxx/defaults.h @@ -361,44 +361,44 @@ static const struct { { 0x78, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, 0x00000040, 0x00000040 }, - /* Errata 354 - Fam10 C2 + /* Errata 354 - Fam10 C2 - FIXME at 25.6.2010 affects RB-C2, BL-C2,DA-C2,RB-C3,BL-C3,DA-C3, but BL-C[23] have no constants * System software should set bit 6 of F4x1[9C,94,8C,84]_x[58:50, 48:40] for all links. */ - { 0x40, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + { 0x40, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, 0x00000040, 0x00000040 }, - { 0x41, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + { 0x41, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, 0x00000040, 0x00000040 }, - { 0x42, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + { 0x42, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, 0x00000040, 0x00000040 }, - { 0x43, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + { 0x43, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, 0x00000040, 0x00000040 }, - { 0x44, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + { 0x44, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, 0x00000040, 0x00000040 }, - { 0x45, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + { 0x45, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, 0x00000040, 0x00000040 }, - { 0x46, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + { 0x46, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, 0x00000040, 0x00000040 }, - { 0x47, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + { 0x47, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, 0x00000040, 0x00000040 }, - { 0x48, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + { 0x48, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, 0x00000040, 0x00000040 }, - { 0x50, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + { 0x50, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, 0x00000040, 0x00000040 }, - { 0x51, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + { 0x51, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, 0x00000040, 0x00000040 }, - { 0x52, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + { 0x52, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, 0x00000040, 0x00000040 }, - { 0x53, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + { 0x53, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, 0x00000040, 0x00000040 }, - { 0x54, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + { 0x54, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, 0x00000040, 0x00000040 }, - { 0x55, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + { 0x55, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, 0x00000040, 0x00000040 }, - { 0x56, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + { 0x56, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, 0x00000040, 0x00000040 }, - { 0x57, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + { 0x57, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, 0x00000040, 0x00000040 }, - { 0x58, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + { 0x58, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, 0x00000040, 0x00000040 }, /* Errata 327 - Fam10 C2/D0 |