diff options
| author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2011-04-21 20:45:45 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2011-04-21 20:45:45 +0000 |
| commit | d4814bd41c080fb9dda87c762fcaecf4e72fc996 (patch) | |
| tree | 57a44f8cbfad3642084b8e3d092e230b8f7e7198 /src/cpu | |
| parent | 1d888a97849d68a7136da558c3697c7f2a8d898a (diff) | |
| download | coreboot-d4814bd41c080fb9dda87c762fcaecf4e72fc996.tar.xz | |
more ifdef -> if fixes
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6536 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/amd/car/cache_as_ram.inc | 2 | ||||
| -rw-r--r-- | src/cpu/intel/car/cache_as_ram.inc | 2 | ||||
| -rw-r--r-- | src/cpu/intel/model_106cx/cache_as_ram.inc | 4 | ||||
| -rw-r--r-- | src/cpu/intel/model_6ex/cache_as_ram.inc | 4 | ||||
| -rw-r--r-- | src/cpu/intel/model_6fx/cache_as_ram.inc | 4 | ||||
| -rw-r--r-- | src/cpu/via/car/cache_as_ram.inc | 2 |
6 files changed, 9 insertions, 9 deletions
diff --git a/src/cpu/amd/car/cache_as_ram.inc b/src/cpu/amd/car/cache_as_ram.inc index 424bd93e7c..48992969f0 100644 --- a/src/cpu/amd/car/cache_as_ram.inc +++ b/src/cpu/amd/car/cache_as_ram.inc @@ -281,7 +281,7 @@ clear_fixed_var_mtrr_out: #if defined(CONFIG_XIP_ROM_SIZE) && defined(CONFIG_XIP_ROM_BASE) -#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK +#if CONFIG_TINY_BOOTBLOCK #define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE #else #define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE diff --git a/src/cpu/intel/car/cache_as_ram.inc b/src/cpu/intel/car/cache_as_ram.inc index fc4eb8ae74..2310d7d9d2 100644 --- a/src/cpu/intel/car/cache_as_ram.inc +++ b/src/cpu/intel/car/cache_as_ram.inc @@ -231,7 +231,7 @@ clear_fixed_var_mtrr_out: #if defined(CONFIG_XIP_ROM_SIZE) && defined(CONFIG_XIP_ROM_BASE) -#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK +#if CONFIG_TINY_BOOTBLOCK #define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE #else #define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE diff --git a/src/cpu/intel/model_106cx/cache_as_ram.inc b/src/cpu/intel/model_106cx/cache_as_ram.inc index e9820c9aeb..da14db22ae 100644 --- a/src/cpu/intel/model_106cx/cache_as_ram.inc +++ b/src/cpu/intel/model_106cx/cache_as_ram.inc @@ -102,7 +102,7 @@ clear_mtrrs: /* Enable cache for our code in Flash because we do XIP here */ movl $MTRRphysBase_MSR(1), %ecx xorl %edx, %edx -#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK +#if CONFIG_TINY_BOOTBLOCK #define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE #else #define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE @@ -128,7 +128,7 @@ clear_mtrrs: movl %eax, %cr0 /* Set up the stack pointer. */ -#if defined(CONFIG_USBDEBUG) && (CONFIG_USBDEBUG == 1) +#if CONFIG_USBDEBUG /* Leave some space for the struct ehci_debug_info. */ movl $(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4 - 128), %eax #else diff --git a/src/cpu/intel/model_6ex/cache_as_ram.inc b/src/cpu/intel/model_6ex/cache_as_ram.inc index 0ee26fcdd2..0906bc0e5f 100644 --- a/src/cpu/intel/model_6ex/cache_as_ram.inc +++ b/src/cpu/intel/model_6ex/cache_as_ram.inc @@ -102,7 +102,7 @@ clear_mtrrs: /* Enable cache for our code in Flash because we do XIP here */ movl $MTRRphysBase_MSR(1), %ecx xorl %edx, %edx -#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK +#if CONFIG_TINY_BOOTBLOCK #define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE #else #define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE @@ -128,7 +128,7 @@ clear_mtrrs: movl %eax, %cr0 /* Set up the stack pointer. */ -#if defined(CONFIG_USBDEBUG) && (CONFIG_USBDEBUG == 1) +#if CONFIG_USBDEBUG /* Leave some space for the struct ehci_debug_info. */ movl $(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4 - 128), %eax #else diff --git a/src/cpu/intel/model_6fx/cache_as_ram.inc b/src/cpu/intel/model_6fx/cache_as_ram.inc index a7605cc689..2f13d355fd 100644 --- a/src/cpu/intel/model_6fx/cache_as_ram.inc +++ b/src/cpu/intel/model_6fx/cache_as_ram.inc @@ -109,7 +109,7 @@ clear_mtrrs: /* Enable cache for our code in Flash because we do XIP here */ movl $MTRRphysBase_MSR(1), %ecx xorl %edx, %edx -#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK +#if CONFIG_TINY_BOOTBLOCK #define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE #else #define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE @@ -135,7 +135,7 @@ clear_mtrrs: movl %eax, %cr0 /* Set up the stack pointer. */ -#if defined(CONFIG_USBDEBUG) && (CONFIG_USBDEBUG == 1) +#if CONFIG_USBDEBUG /* Leave some space for the struct ehci_debug_info. */ movl $(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4 - 128), %eax #else diff --git a/src/cpu/via/car/cache_as_ram.inc b/src/cpu/via/car/cache_as_ram.inc index 6303162cf0..20b3220f87 100644 --- a/src/cpu/via/car/cache_as_ram.inc +++ b/src/cpu/via/car/cache_as_ram.inc @@ -110,7 +110,7 @@ clear_fixed_var_mtrr_out: movl $(~(CacheSize - 1) | MTRRphysMaskValid), %eax wrmsr -#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK +#if CONFIG_TINY_BOOTBLOCK #define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE #else #define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE |