AMD northbridge: copy TOP_MEM and TOP_MEM2 for distribution

Take a copy of BSP CPU's TOP_MEM and TOP_MEM2 MSRs to be distributed
to AP CPUs and factor out the debugging info from setup_uma_memory().

Change-Id: I1acb4eaa3fe118aee223df1ebff997289f5d3a56
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/1387
Tested-by: build bot (Jenkins)
Reviewed-by: Zheng Bao <zheng.bao@amd.com>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>

1 files changed, 38 insertions, 0 deletions

diff --git a/src/cpu/amd/mtrr/amd_mtrr.c b/src/cpu/amd/mtrr/amd_mtrr.c
index f639d59bad..9349ad4a3b 100644
--- a/src/cpu/amd/mtrr/amd_mtrr.c
+++ b/src/cpu/amd/mtrr/amd_mtrr.c
@@ -116,6 +116,44 @@ static void uma_fb_resource(void *gp, struct device *dev, struct resource *res)
 	}
 }
 
+/* These will likely move to some device node or cbmem. */
+static uint64_t amd_topmem = 0;
+static uint64_t amd_topmem2 = 0;
+
+uint64_t bsp_topmem(void)
+{
+	return amd_topmem;
+}
+
+uint64_t bsp_topmem2(void)
+{
+	return amd_topmem2;
+}
+
+/* Take a copy of BSP CPUs TOP_MEM and TOP_MEM2 registers,
+ * so they can be distributed to AP CPUs. Not strictly MTRRs,
+ * but this is not that bad a place to have this code.
+ */
+void setup_bsp_ramtop(void)
+{
+	msr_t msr, msr2;
+
+	/* TOP_MEM: the top of DRAM below 4G */
+	msr = rdmsr(TOP_MEM);
+	printk(BIOS_INFO,
+	    "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
+	     __func__, msr.lo, msr.hi);
+
+	/* TOP_MEM2: the top of DRAM above 4G */
+	msr2 = rdmsr(TOP_MEM2);
+	printk(BIOS_INFO,
+	    "%s, TOP MEM2: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
+	     __func__, msr2.lo, msr2.hi);
+
+	amd_topmem = (uint64_t) msr.hi<<32 | msr.lo;
+	amd_topmem2 = (uint64_t) msr2.hi<<32 | msr2.lo;
+}
+
 void amd_setup_mtrrs(void)
 {
 	unsigned long address_bits;