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author | Hamish Guthrie <hamish@prodigi.ch> | 2005-08-17 04:48:17 +0000 |
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committer | Hamish Guthrie <hamish@prodigi.ch> | 2005-08-17 04:48:17 +0000 |
commit | e251c42197225d3783699343e0805c425aeae8e9 (patch) | |
tree | 3544e36115026aae4dfa74cd569497c5e322cd46 /src/cpu | |
parent | 3d291aa6a2e5ae309a805c602a3768b6d86d8a2d (diff) | |
download | coreboot-e251c42197225d3783699343e0805c425aeae8e9.tar.xz |
Changed udelay in delay_tsc to be more be more considerate of single
processor environments.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2009 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/x86/tsc/delay_tsc.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/cpu/x86/tsc/delay_tsc.c b/src/cpu/x86/tsc/delay_tsc.c index c7c431baac..31c5bf80eb 100644 --- a/src/cpu/x86/tsc/delay_tsc.c +++ b/src/cpu/x86/tsc/delay_tsc.c @@ -159,7 +159,11 @@ void udelay(unsigned us) count = rdtscll(); stop = clocks + count; while(stop > count) { +#ifdef CONFIG_SMP +#if CONFIG_SMP == 1 cpu_relax(); +#endif +#endif count = rdtscll(); } } |