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| author | Xavi Drudis Ferran <xdrudis@tinet.cat> | 2010-08-22 19:49:46 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-08-22 19:49:46 +0000 |
| commit | e9f0dfe63185222e403d81dd1b6bce27d81eb9a5 (patch) | |
| tree | e3cc0b59a205113b64c694d29a5d045262272a80 /src/cpu | |
| parent | cc6244a922ecf4cc58e1c7158cb211e7ef1ee7c1 (diff) | |
| download | coreboot-e9f0dfe63185222e403d81dd1b6bce27d81eb9a5.tar.xz | |
Complete code for errata 343. Revision Guide for AMD Family10h
processors (#41322) rev 3.74 June 2010 says to set the register
to 1 before CAR and to 0 after. We were setting it to 0 after CAR,
but not to 1 before.
Signed-off-by: Xavi Drudis Ferran <xdrudis@tinet.cat>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5731 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/amd/model_10xxx/defaults.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/cpu/amd/model_10xxx/defaults.h b/src/cpu/amd/model_10xxx/defaults.h index c133c94c4f..fdbe3d8fe4 100644 --- a/src/cpu/amd/model_10xxx/defaults.h +++ b/src/cpu/amd/model_10xxx/defaults.h @@ -88,6 +88,10 @@ static const struct { { CPUIDFEATURES, AMD_FAM10_ALL, AMD_PTYPE_DC, 0x00000000, 1 << (33-32), 0x00000000, 1 << (33-32) }, /* [ExtendedFeatEn]=1 */ + + { BU_CFG2, AMD_DRBH_Cx , AMD_PTYPE_ALL, + 0x00000000, 1 << (35-32), + 0x00000000, 1 << (35-32) }, /* Erratum 343 (set to 0 after CAR, in post_cache_as_ram() ) */ }; |