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authorEric Biederman <ebiederm@xmission.com>2004-10-21 02:53:25 +0000
committerEric Biederman <ebiederm@xmission.com>2004-10-21 02:53:25 +0000
commitf3aa4707d3bef9f529a70a204dbc648968cf7c20 (patch)
tree821cae3c43eace6e1e03f784140e17cf63693924 /src/cpu
parent29490a17ced79768a337642f36066c5c07922966 (diff)
downloadcoreboot-f3aa4707d3bef9f529a70a204dbc648968cf7c20.tar.xz
- Explicitly disable the fixed dram extensions bits.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1697 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/amd/mtrr/amd_mtrr.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/cpu/amd/mtrr/amd_mtrr.c b/src/cpu/amd/mtrr/amd_mtrr.c
index 7c8d50ae68..ab6bc2bbee 100644
--- a/src/cpu/amd/mtrr/amd_mtrr.c
+++ b/src/cpu/amd/mtrr/amd_mtrr.c
@@ -24,6 +24,11 @@ void amd_setup_mtrrs(void)
device_t dev;
msr_t msr;
+ /* Disable the access to AMD RdDram and WrDram extension bits */
+ msr = rdmsr(SYSCFG_MSR);
+ msr.lo &= ~SYSCFG_MSR_MtrrFixDramModEn;
+ wrmsr(SYSCFG_MSR, msr);
+
x86_setup_mtrrs();
/* Except for the PCI MMIO hole just before 4GB there are no