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authorVladimir Serbinenko <phcoder@gmail.com>2014-06-11 18:52:11 +0000
committerVladimir Serbinenko <phcoder@gmail.com>2014-07-19 14:25:44 +0200
commit4af1245ea1b3504c28bfc27b351af3195141631f (patch)
tree3a5416760986c973636915f7cedf8bc3bf369504 /src/cpu
parentf2b3cd63cfa2fcf7874b1947c60c22b664a277c7 (diff)
downloadcoreboot-4af1245ea1b3504c28bfc27b351af3195141631f.tar.xz
intel/model_2065x: Remove dead code.
nehalem uses gm45-like approach to resume backup so this code is never used. Change-Id: Ic32aa73f8d5b164b1c57815f6f44b2732fdbdcdb Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/5975 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/intel/model_2065x/cache_as_ram.inc21
1 files changed, 0 insertions, 21 deletions
diff --git a/src/cpu/intel/model_2065x/cache_as_ram.inc b/src/cpu/intel/model_2065x/cache_as_ram.inc
index e46a2ee3f3..21f626b9de 100644
--- a/src/cpu/intel/model_2065x/cache_as_ram.inc
+++ b/src/cpu/intel/model_2065x/cache_as_ram.inc
@@ -274,27 +274,6 @@ before_romstage:
post_code(0x3c)
-#if CONFIG_HAVE_ACPI_RESUME
- movl CBMEM_BOOT_MODE, %eax
- cmpl $0x2, %eax // Resume?
- jne __acpi_resume_backup_done
-
- /* copy 1MB - 64K to high tables ram_base to prevent memory corruption
- * through stage 2. We could keep stuff like stack and heap in high
- * tables memory completely, but that's a wonderful clean up task for
- * another day.
- */
- cld
- movl $CONFIG_RAMBASE, %esi
- movl CBMEM_RESUME_BACKUP, %edi
- movl $HIGH_MEMORY_SAVE / 4, %ecx
- rep movsl
-
-__acpi_resume_backup_done:
-#endif
-
- post_code(0x3d)
-
__main:
post_code(POST_PREPARE_RAMSTAGE)
cld /* Clear direction flag. */