diff options
| author | Edwin Beasant <edwin_beasant@virtensys.com> | 2010-01-26 11:22:43 +0000 |
|---|---|---|
| committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-01-26 11:22:43 +0000 |
| commit | a9796ed362f0d2b80f6c4e59c94db5d564324ebb (patch) | |
| tree | ff2eb71b69a93badce5d8b9e6d2933446d0a335b /src/cpu | |
| parent | e8d943f2668ab25d98ed61cd10d68353c4915f4b (diff) | |
| download | coreboot-a9796ed362f0d2b80f6c4e59c94db5d564324ebb.tar.xz | |
- Clean up and comment writing of MSRs for cache control (Backport from v3)
- Invalidate Cache Tags (by means of in-place rewrite of cache data) which allows CAR data to be flushed to RAM
- Re-enable cache after flush of CAR to RAM
Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5055 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/amd/model_lx/cache_as_ram.inc | 40 |
1 files changed, 17 insertions, 23 deletions
diff --git a/src/cpu/amd/model_lx/cache_as_ram.inc b/src/cpu/amd/model_lx/cache_as_ram.inc index ee4902a269..1abfd8168a 100644 --- a/src/cpu/amd/model_lx/cache_as_ram.inc +++ b/src/cpu/amd/model_lx/cache_as_ram.inc @@ -178,31 +178,28 @@ DCacheSetupGood: call cache_as_ram_main done_cache_as_ram_main: - /* If you wanted to maintain the stack in memory you would need to set the tags as dirty - so the wbinvd would push out the old stack contents to memory */ - /* Clear the cache, the following code from crt0.S.lb will setup a new stack*/ + /* We now run over the stack-in-cache, copying it back to itself to invalidate the cache */ + + push %edi + mov $(CONFIG_DCACHE_RAM_SIZE/4),%ecx + push %esi + mov $(CONFIG_DCACHE_RAM_BASE),%edi + mov %edi,%esi + cld + rep movsl %ds:(%esi),%es:(%edi) + pop %esi + pop %edi + + /* Clear the cache out to ram */ wbinvd - -/* the following code is from crt0.S.lb */ -/* This takes the place of the post-CAR funtions that the K8 uses to setup the stack and copy LB low.*/ - -#ifndef CONSOLE_DEBUG_TX_STRING - /* uses: esp, ebx, ax, dx */ -# define __CRT_CONSOLE_TX_STRING(string) \ - mov string, %ebx ; \ - CALLSP(crt_console_tx_string) - -# if defined(CONFIG_TTYS0_BASE) && (ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG) -# define CONSOLE_DEBUG_TX_STRING(string) __CRT_CONSOLE_TX_STRING(string) -# else -# define CONSOLE_DEBUG_TX_STRING(string) -# endif -#endif + /* re-enable the cache */ + movl %cr0, %eax + xorl $(CR0_CD + CR0_NW), %eax /* clear the CD and NW bits */ + movl %eax, %cr0 /* clear boot_complete flag */ xorl %ebp, %ebp __main: - CONSOLE_DEBUG_TX_STRING($str_copying_to_ram) /* * Copy data into RAM and clear the BSS. Since these segments @@ -218,9 +215,6 @@ __main: * Normally this is copying from FLASH ROM to RAM. */ movl %ebp, %esi - /* FIXME: look for a proper place for the stack */ - movl $0x4000000, %esp - movl %esp, %ebp pushl %esi pushl $str_coreboot_ram_name call cbfs_and_run_core |