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| author | Subrata Banik <subrata.banik@intel.com> | 2019-05-10 11:58:37 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2019-05-12 03:08:10 +0000 |
| commit | 7bc9036d160c6235d96e1bed49331696d7fa9a09 (patch) | |
| tree | 4f740f39be9343411083d40be948cdec3c5daccd /src/cpu | |
| parent | 1159a163cd36318d27f8f3b71617ad4a5b781efb (diff) | |
| download | coreboot-7bc9036d160c6235d96e1bed49331696d7fa9a09.tar.xz | |
arch/cpu: Rename mp_get_apic_id() and add_cpu_map_entry() function
This patch renames mp_get_apic_id() to cpu_get_apic_id() and
add_cpu_map_entry() to cpu_add_map_entry() in order access it
outside CONFIG_PARALLEL_MP kconfig scope.
Also make below changes
- Make cpu_add_map_entry() function available externally to call
it from mp_init.c and lapic_cpu_init.c.
BRANCH=none
BUG=b:79562868
Change-Id: I6a6c85df055bc0b5fc8c850cfa04d50859067088
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32701
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/x86/mp_init.c | 35 |
1 files changed, 7 insertions, 28 deletions
diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c index 9d51b3e8b5..8957515540 100644 --- a/src/cpu/x86/mp_init.c +++ b/src/cpu/x86/mp_init.c @@ -135,20 +135,8 @@ struct mp_flight_plan { static int global_num_aps; static struct mp_flight_plan mp_info; -struct cpu_map { - struct device *dev; - /* Keep track of default apic ids for SMM. */ - int default_apic_id; -}; - -/* Keep track of APIC and device structure for each CPU. */ -static struct cpu_map cpus[CONFIG_MAX_CPUS]; - -static inline void add_cpu_map_entry(const struct cpu_info *info) -{ - cpus[info->index].dev = info->cpu; - cpus[info->index].default_apic_id = cpuid_ebx(1) >> 24; -} +/* Keep track of device structure for each CPU. */ +static struct device *cpus_dev[CONFIG_MAX_CPUS]; static inline void barrier_wait(atomic_t *b) { @@ -212,9 +200,9 @@ static void asmlinkage ap_init(unsigned int cpu) info = cpu_info(); info->index = cpu; - info->cpu = cpus[cpu].dev; + info->cpu = cpus_dev[cpu]; - add_cpu_map_entry(info); + cpu_add_map_entry(info->index); thread_init_cpu_info_non_bsp(info); /* Fix up APIC id with reality. */ @@ -411,7 +399,7 @@ static int allocate_cpu_devices(struct bus *cpu_bus, struct mp_params *p) continue; } new->name = processor_name; - cpus[i].dev = new; + cpus_dev[i] = new; } return max_cpus; @@ -589,7 +577,7 @@ static void init_bsp(struct bus *cpu_bus) printk(BIOS_CRIT, "BSP index(%d) != 0!\n", info->index); /* Track BSP in cpu_map structures. */ - add_cpu_map_entry(info); + cpu_add_map_entry(info->index); } /* @@ -667,15 +655,6 @@ static void mp_initialize_cpu(void) cpu_initialize(info->index); } -/* Returns APIC id for coreboot CPU number or < 0 on failure. */ -int mp_get_apic_id(int logical_cpu) -{ - if (logical_cpu >= CONFIG_MAX_CPUS || logical_cpu < 0) - return -1; - - return cpus[logical_cpu].default_apic_id; -} - void smm_initiate_relocation_parallel(void) { if ((lapic_read(LAPIC_ICR) & LAPIC_ICR_BUSY)) { @@ -769,7 +748,7 @@ static void adjust_smm_apic_id_map(struct smm_loader_params *smm_params) struct smm_runtime *runtime = smm_params->runtime; for (i = 0; i < CONFIG_MAX_CPUS; i++) - runtime->apic_id_to_cpu[i] = mp_get_apic_id(i); + runtime->apic_id_to_cpu[i] = cpu_get_apic_id(i); } static int install_relocation_handler(int num_cpus, size_t save_state_size) |