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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-07-20 03:23:06 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-07-21 15:35:49 +0200 |
| commit | a877b74a79028cef9a6a50a40c6d895de5c88fbd (patch) | |
| tree | 35c09b716138277837a9b8e1d459eb373ce90eab /src/cpu | |
| parent | 7899db23557cc5eacadf42b53eaad5ebc0fe0c0e (diff) | |
| download | coreboot-a877b74a79028cef9a6a50a40c6d895de5c88fbd.tar.xz | |
AMD k8 fam10: Fix CAR GLOBALS late in romstage
Zero-filling memory below 1 MiB resets car_migrated variable so
any CAR GLOBALs are not addressed correctly for the remaining
time in romstage. Also there is no actual need to do this as
ramstage loader handles BSS.
This fixes regression with commit 70cd54310 that broke fam10 boards
with romstage spinlocks enabled.
Change-Id: I7418821997a980ae5b818bd57e8a1b6507a543af
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/15754
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/amd/car/post_cache_as_ram.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c index 9cf3c6e78f..ad5a5c7dcf 100644 --- a/src/cpu/amd/car/post_cache_as_ram.c +++ b/src/cpu/amd/car/post_cache_as_ram.c @@ -89,9 +89,6 @@ static void prepare_ramstage_region(int s3resume) if (resume_backup_memory) memcpy_(resume_backup_memory, (void *) CONFIG_RAMBASE, HIGH_MEMORY_SAVE - backup_top); - memset_((void*) CONFIG_RAMBASE, 0, HIGH_MEMORY_SAVE - backup_top); - } else { - memset_((void*)0, 0, CONFIG_RAMTOP - backup_top); } print_car_debug(" Done\n"); |