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| author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-01-18 23:28:52 +0100 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2012-01-20 14:39:00 +0100 |
| commit | c6daaa7497489c578263cc057b2903c04000b01e (patch) | |
| tree | 85d91202d20bf2608858aa1da4173ba23b647ab1 /src/cpu | |
| parent | 938ae3ed18ac72878e572e4cdc2ff5029fe97d74 (diff) | |
| download | coreboot-c6daaa7497489c578263cc057b2903c04000b01e.tar.xz | |
Leave SSE and MMX instructions enabled in coreboot
In order to use SSE+MMX optimized payloads we don't want to disable SSE+MMX
instructions in the CPU after romstage.
Change-Id: I51aeb01f04492ad7bc8b1fe181a4ae17fe0ca61e
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/553
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/x86/mmx_disable.inc | 24 | ||||
| -rw-r--r-- | src/cpu/x86/sse_disable.inc | 44 |
2 files changed, 0 insertions, 68 deletions
diff --git a/src/cpu/x86/mmx_disable.inc b/src/cpu/x86/mmx_disable.inc deleted file mode 100644 index 1a4e70f0c6..0000000000 --- a/src/cpu/x86/mmx_disable.inc +++ /dev/null @@ -1,24 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2002 Eric Biederman <ebiederm@xmission.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - - /* - * Execute the EMMS (Empty MMX Technology State) instruction. - */ - emms - diff --git a/src/cpu/x86/sse_disable.inc b/src/cpu/x86/sse_disable.inc deleted file mode 100644 index 37458c9cd2..0000000000 --- a/src/cpu/x86/sse_disable.inc +++ /dev/null @@ -1,44 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2002 Eric Biederman <ebiederm@xmission.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - - /* - * Put the processor back into a reset state - * with respect to the XMM registers. - */ - xorps %xmm0, %xmm0 - xorps %xmm1, %xmm1 - xorps %xmm2, %xmm2 - xorps %xmm3, %xmm3 - xorps %xmm4, %xmm4 - xorps %xmm5, %xmm5 - xorps %xmm6, %xmm6 - xorps %xmm7, %xmm7 - - /* - * Disable SSE instructions. - * - * Clear CR4[9] (OSFXSR) and CR4[10] (OSXMMEXCPT) so that the - * processor can no longer execute SSE instructions, and unmasked - * SIMD floating point exceptions will generate an invalid opcode - * exception (#UD). - */ - movl %cr4, %eax - andl $~(3 << 9), %eax - movl %eax, %cr4 - |