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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-28 16:22:06 +0100 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-12-19 03:26:27 +0000 |
| commit | 494b031eb7e1d6cca38d41a80e96e872c8294d66 (patch) | |
| tree | 80c56ad64115783a443926f97265d7561ad1148e /src/cpu | |
| parent | 1cb9cd5798966bf026e5f1ef3abf7642fa1bc41b (diff) | |
| download | coreboot-494b031eb7e1d6cca38d41a80e96e872c8294d66.tar.xz | |
arch/x86: Drop uses of ROMCC_BOOTBLOCK
Change-Id: Ia0405fdd448cb31b3c6ca3b3d76e49e9f430bf74
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37339
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/x86/Kconfig | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index efb5fa96e9..76446a04c0 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -77,7 +77,6 @@ config XIP_ROM_SIZE config SETUP_XIP_CACHE bool - depends on !ROMCC_BOOTBLOCK depends on !NO_XIP_EARLY_STAGES help Select this option to set up an MTRR to cache XIP stages loaded |