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authorArthur Heymans <arthur@aheymans.xyz>2017-10-25 09:57:10 +0200
committerNico Huber <nico.h@gmx.de>2017-10-29 14:16:30 +0000
commit73abfead52afd8e45dee7cb515bc111f34860104 (patch)
treeb5d192e54bf0b67436135e985d3d11c974c40fb5 /src/cpu
parentb1cee625127a9e727937a761a8ab172adf946cc4 (diff)
downloadcoreboot-73abfead52afd8e45dee7cb515bc111f34860104.tar.xz
cpu/intel/model_1067x: Select UDELAY_LAPIC
This was moved out of northbridge/gm45 but was accidentally? commented out in c5d972d073c "Move select UDELAY_LAPIC from nb/gm45/Kconfig to cpu/model_1067x/Kconfig" The intel eagleheights mainboard also uses UDELAY_LAPIC with this change and is untested. Change-Id: I70e51fa50935baf187cef60f2e636251b40d6475 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/22172 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/intel/model_1067x/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/intel/model_1067x/Kconfig b/src/cpu/intel/model_1067x/Kconfig
index 2e154a3b66..3ea812573c 100644
--- a/src/cpu/intel/model_1067x/Kconfig
+++ b/src/cpu/intel/model_1067x/Kconfig
@@ -6,7 +6,7 @@ config CPU_INTEL_MODEL_1067X
select ARCH_RAMSTAGE_X86_32
select SMP
select SSE2
-# select UDELAY_LAPIC
+ select UDELAY_LAPIC
select TSC_SYNC_MFENCE
select SUPPORT_CPU_UCODE_IN_CBFS
select CPU_INTEL_COMMON