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authorAngel Pons <th3fanbus@gmail.com>2020-07-07 21:44:00 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-07-09 23:43:30 +0000
commit8a132065492bde4625675e572b39bfcbf09cdf29 (patch)
treececb104e23ea6ff4d44c844fc6431d22314e1b3e /src/cpu
parent5eb75fe55011bc80d9e9ef6dea801830146274ce (diff)
downloadcoreboot-8a132065492bde4625675e572b39bfcbf09cdf29.tar.xz
cpu/intel/model_206ax/finalize.c: Drop dead code
This code is not even being build-tested. Drop it before it grows moss. Change-Id: I76bf20bb2ec1cdd7ffee4430c80609978afaa1a4 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43206 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/intel/model_206ax/finalize.c18
1 files changed, 0 insertions, 18 deletions
diff --git a/src/cpu/intel/model_206ax/finalize.c b/src/cpu/intel/model_206ax/finalize.c
index 10a95a2ce5..c7579f1764 100644
--- a/src/cpu/intel/model_206ax/finalize.c
+++ b/src/cpu/intel/model_206ax/finalize.c
@@ -16,24 +16,6 @@ void intel_model_206ax_finalize_smm(void)
if (cpuid_ecx(1) & (1 << 25))
msr_set_bit(MSR_FEATURE_CONFIG, 0);
-#ifdef LOCK_POWER_CONTROL_REGISTERS
- /*
- * Lock the power control registers.
- *
- * These registers can be left unlocked if modifying power
- * limits from the OS is desirable. Modifying power limits
- * from the OS can be especially useful for experimentation
- * during early phases of system bringup while the thermal
- * power envelope is being proven.
- */
-
- msr_set_bit(MSR_PP0_CURRENT_CONFIG, 31);
- msr_set_bit(MSR_PP1_CURRENT_CONFIG, 31);
- msr_set_bit(MSR_PKG_POWER_LIMIT, 63);
- msr_set_bit(MSR_PP0_POWER_LIMIT, 31);
- msr_set_bit(MSR_PP1_POWER_LIMIT, 31);
-#endif
-
/* Lock TM interrupts - route thermal events to all processors */
msr_set_bit(MSR_MISC_PWR_MGMT, 22);