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authorAaron Durbin <adurbin@chromium.org>2013-01-12 00:45:10 -0600
committerRonald G. Minnich <rminnich@gmail.com>2013-03-18 17:08:18 +0100
commita416bfecedb7d55cf3c631d230e3500b314fc880 (patch)
treecc29eb613abb666dccc6507065fdd8c366444750 /src/cpu
parent29ffa54969414b833de5c61b507b061f920d650b (diff)
downloadcoreboot-a416bfecedb7d55cf3c631d230e3500b314fc880.tar.xz
haswell: move definition of CORE_THREAD_COUNT_MSR
This just moves the definiton of CORE_THREAD_COUNT_MSR so that future code can utilize it. Change-Id: I15a381090f21ff758288f55dc964b6694feb6064 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/2744 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/intel/haswell/haswell.h1
-rw-r--r--src/cpu/intel/haswell/smmrelocate.c2
2 files changed, 1 insertions, 2 deletions
diff --git a/src/cpu/intel/haswell/haswell.h b/src/cpu/intel/haswell/haswell.h
index f5c580ec7e..7ce868d30d 100644
--- a/src/cpu/intel/haswell/haswell.h
+++ b/src/cpu/intel/haswell/haswell.h
@@ -25,6 +25,7 @@
/* Haswell bus clock is fixed at 100MHz */
#define HASWELL_BCLK 100
+#define CORE_THREAD_COUNT_MSR 0x35
#define IA32_FEATURE_CONTROL 0x3a
#define CPUID_VMX (1 << 5)
#define CPUID_SMX (1 << 6)
diff --git a/src/cpu/intel/haswell/smmrelocate.c b/src/cpu/intel/haswell/smmrelocate.c
index e2a6482ba6..1ccc9bb5b3 100644
--- a/src/cpu/intel/haswell/smmrelocate.c
+++ b/src/cpu/intel/haswell/smmrelocate.c
@@ -36,8 +36,6 @@
#define UNCORE_EMRRphysBase_MSR 0x2f4
#define UNCORE_EMRRphysMask_MSR 0x2f5
-#define CORE_THREAD_COUNT_MSR 0x35
-
#define SMRR_SUPPORTED (1<<11)
#define EMRR_SUPPORTED (1<<12)