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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-06-17 10:34:26 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-24 11:49:15 +0000 |
| commit | c3c55210ee598e2dfcfc0bbe664cd703e6fdf3fe (patch) | |
| tree | 8efb929b92a7c8cfd7cb92042ac628d396e3d6ae /src/cpu | |
| parent | 5daa1d38985a19dc84f2299dba2e340dda2870ae (diff) | |
| download | coreboot-c3c55210ee598e2dfcfc0bbe664cd703e6fdf3fe.tar.xz | |
ACPI: Replace smm_setup_structures()
Except for whitespace and varying casts the codes were
the same when implemented.
Platforms that did not implement this are tagged with
ACPI_NO_SMI_GNVS.
Change-Id: I31ec85ebce03d0d472403806969f863e4ca03b6b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42362
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/amd/agesa/Kconfig | 1 | ||||
| -rw-r--r-- | src/cpu/amd/pi/Kconfig | 1 | ||||
| -rw-r--r-- | src/cpu/x86/smm/smi_trigger.c | 35 |
3 files changed, 36 insertions, 1 deletions
diff --git a/src/cpu/amd/agesa/Kconfig b/src/cpu/amd/agesa/Kconfig index 3cd387dba7..499cc5b276 100644 --- a/src/cpu/amd/agesa/Kconfig +++ b/src/cpu/amd/agesa/Kconfig @@ -17,6 +17,7 @@ config CPU_AMD_AGESA select SPI_FLASH if HAVE_ACPI_RESUME select SMM_ASEG select SSE2 + select ACPI_NO_SMI_GNVS if CPU_AMD_AGESA diff --git a/src/cpu/amd/pi/Kconfig b/src/cpu/amd/pi/Kconfig index 7bcfa61546..533507ed06 100644 --- a/src/cpu/amd/pi/Kconfig +++ b/src/cpu/amd/pi/Kconfig @@ -17,6 +17,7 @@ config CPU_AMD_PI select SPI_FLASH if HAVE_ACPI_RESUME select SMM_ASEG select SSE2 + select ACPI_NO_SMI_GNVS if CPU_AMD_PI diff --git a/src/cpu/x86/smm/smi_trigger.c b/src/cpu/x86/smm/smi_trigger.c index f1031a00f6..4b637450b7 100644 --- a/src/cpu/x86/smm/smi_trigger.c +++ b/src/cpu/x86/smm/smi_trigger.c @@ -1,9 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <acpi/acpi_gnvs.h> #include <arch/io.h> #include <console/console.h> #include <cpu/x86/smm.h> +static void set_smm_gnvs_ptr(void); + int apm_control(u8 cmd) { if (!CONFIG(HAVE_SMI_HANDLER)) @@ -21,7 +24,8 @@ int apm_control(u8 cmd) printk(BIOS_DEBUG, "Enabling ACPI via APMC.\n"); break; case APM_CNT_GNVS_UPDATE: - break; + set_smm_gnvs_ptr(); + return 0; case APM_CNT_FINALIZE: printk(BIOS_DEBUG, "Finalizing SMM.\n"); break; @@ -41,3 +45,32 @@ int apm_control(u8 cmd) printk(BIOS_DEBUG, "APMC done.\n"); return 0; } + +static void set_smm_gnvs_ptr(void) +{ + uintptr_t gnvs_address; + + if (CONFIG(ACPI_NO_SMI_GNVS)) { + printk(BIOS_WARNING, "%s() is not implemented\n", __func__); + return; + } + + gnvs_address = (uintptr_t)acpi_get_gnvs(); + if (!gnvs_address) + return; + + /* + * Issue SMI to set the gnvs pointer in SMM. + * + * EAX = APM_CNT_GNVS_UPDATE + * EBX = gnvs pointer + * EDX = APM_CNT + */ + asm volatile ( + "outb %%al, %%dx\n\t" + : /* ignore result */ + : "a" (APM_CNT_GNVS_UPDATE), + "b" (gnvs_address), + "d" (APM_CNT) + ); +} |