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authorRizwan Qureshi <rizwan.qureshi@intel.com>2019-09-05 20:06:20 +0530
committerPatrick Georgi <pgeorgi@google.com>2019-09-15 20:45:21 +0000
commit279d8b5f3d31fe95c9c403dd12b4d5d02551b6ea (patch)
treeda56d88ce7adb153dda76641c77b56302bf77d09 /src/cpu
parent49ca968b0bfc44f09203c8be801ac26953ea5a0f (diff)
downloadcoreboot-279d8b5f3d31fe95c9c403dd12b4d5d02551b6ea.tar.xz
cpu/intel/microcode: Make microcode lib available in bootblock
Make microcode lib available in bootblock. Now that microcode.c is compiled in bootlock no need to include it explicitly, hence remove its references. Change-Id: I419da6af70222902e3ca39fc2133d5dc8558e053 Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35278 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/intel/haswell/bootblock.c1
-rw-r--r--src/cpu/intel/microcode/Makefile.inc1
2 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/intel/haswell/bootblock.c b/src/cpu/intel/haswell/bootblock.c
index 37ce574f35..94e5d36e18 100644
--- a/src/cpu/intel/haswell/bootblock.c
+++ b/src/cpu/intel/haswell/bootblock.c
@@ -18,7 +18,6 @@
#include <arch/io.h>
#include <halt.h>
-#include <cpu/intel/microcode/microcode.c>
#include "haswell.h"
#include <southbridge/intel/lynxpoint/pch.h>
diff --git a/src/cpu/intel/microcode/Makefile.inc b/src/cpu/intel/microcode/Makefile.inc
index 2df1d5eb6f..b13172ee16 100644
--- a/src/cpu/intel/microcode/Makefile.inc
+++ b/src/cpu/intel/microcode/Makefile.inc
@@ -1,5 +1,6 @@
bootblock-$(CONFIG_MICROCODE_UPDATE_PRE_RAM) += microcode_asm.S
romstage-$(CONFIG_MICROCODE_UPDATE_PRE_RAM) += microcode_asm.S
+bootblock-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += microcode.c
ramstage-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += microcode.c
romstage-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += microcode.c