summaryrefslogtreecommitdiff
path: root/src/cpu
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2016-11-30 14:53:24 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-01-16 11:51:07 +0000
commit5c29daa150c5ba0a8acbdec90013f6526ac8d1f7 (patch)
treebc8db9ff7e752d2532531bbd6dad8c8713841f39 /src/cpu
parentf86baf3e903ddd81369b9ef7605fb5463498cbff (diff)
downloadcoreboot-5c29daa150c5ba0a8acbdec90013f6526ac8d1f7.tar.xz
buildsystem: Promote rules.h to default include
Does not fix 3rdparty/, *.S or *.ld or yet. Change-Id: I66b48013dd89540b35ab219d2b64bc13f5f19cda Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/17656 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/intel/microcode/microcode.c1
-rw-r--r--src/cpu/x86/32bit/entry32.inc1
-rw-r--r--src/cpu/x86/pae/pgtbl.c1
3 files changed, 0 insertions, 3 deletions
diff --git a/src/cpu/intel/microcode/microcode.c b/src/cpu/intel/microcode/microcode.c
index d217cfd0bf..abaeeb6be8 100644
--- a/src/cpu/intel/microcode/microcode.c
+++ b/src/cpu/intel/microcode/microcode.c
@@ -27,7 +27,6 @@
#include <arch/cpu.h>
#include <cpu/x86/msr.h>
#include <cpu/intel/microcode.h>
-#include <rules.h>
#if !defined(__PRE_RAM__)
#include <smp/spinlock.h>
diff --git a/src/cpu/x86/32bit/entry32.inc b/src/cpu/x86/32bit/entry32.inc
index ae7cc019d9..837bccf87a 100644
--- a/src/cpu/x86/32bit/entry32.inc
+++ b/src/cpu/x86/32bit/entry32.inc
@@ -15,7 +15,6 @@
#include <arch/rom_segs.h>
#include <cpu/x86/post_code.h>
-#include <rules.h>
#include <arch/x86/gdt_init.S>
.code32
diff --git a/src/cpu/x86/pae/pgtbl.c b/src/cpu/x86/pae/pgtbl.c
index 2cc9ba629f..278d50f833 100644
--- a/src/cpu/x86/pae/pgtbl.c
+++ b/src/cpu/x86/pae/pgtbl.c
@@ -20,7 +20,6 @@
#include <cpu/x86/cr.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/pae.h>
-#include <rules.h>
#include <string.h>
#include <symbols.h>