CONFIG_USE_PRINTK_IN_CAR and ht chain id for HTX support in

serengeti_cheeatah


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2439 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

6 files changed, 142 insertions, 55 deletions

diff --git a/src/cpu/amd/car/copy_and_run.c b/src/cpu/amd/car/copy_and_run.c
index 7471a53076..344e6d1b54 100644
--- a/src/cpu/amd/car/copy_and_run.c
+++ b/src/cpu/amd/car/copy_and_run.c
@@ -4,7 +4,7 @@
 */
 static inline void print_debug_cp_run(const char *strval, uint32_t val)
 {
-#if CONFIG_USE_INIT
+#if CONFIG_USE_PRINTK_IN_CAR
         printk_debug("%s%08x\r\n", strval, val);
 #else
         print_debug(strval); print_debug_hex32(val); print_debug("\r\n");
diff --git a/src/cpu/amd/car/disable_cache_as_ram.c b/src/cpu/amd/car/disable_cache_as_ram.c
index 56e60eefb7..fc30ee9ab1 100644
--- a/src/cpu/amd/car/disable_cache_as_ram.c
+++ b/src/cpu/amd/car/disable_cache_as_ram.c
@@ -2,6 +2,7 @@
 /* be warned, this file will be used other cores and core 0 / node 0 */
 static inline __attribute__((always_inline)) void disable_cache_as_ram(void)
 {
+
         __asm__ volatile (
 
         /* We don't need cache as ram for now on */
@@ -43,27 +44,20 @@ static inline __attribute__((always_inline)) void disable_cache_as_ram(void)
 
         );
 }
-/* be warned, this file will be used core 0 / node 0 and ram stack is ready*/
 
 static void disable_cache_as_ram_bsp(void)
 {
-        __asm__ volatile (
-
-        "pushl	%ecx\n\t"
-        "pushl 	%edx\n\t"
-        "pushl 	%eax\n\t"
-
+	__asm__ volatile (
+//		"pushl %eax\n\t"
+ 		"pushl %edx\n\t"
+ 		"pushl %ecx\n\t"
 	);
 
 	disable_cache_as_ram();
-
-	__asm__ volatile (
-
-        "popl   %eax\n\t"
-        "popl   %edx\n\t"
-        "popl   %ecx\n\t"
-
+        __asm__ volatile (
+                "popl %ecx\n\t"
+                "popl %edx\n\t"
+//                "popl %eax\n\t"
         );
 }
 
-
diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c
index 813745d66e..d47d552f79 100644
--- a/src/cpu/amd/car/post_cache_as_ram.c
+++ b/src/cpu/amd/car/post_cache_as_ram.c
@@ -7,7 +7,7 @@
 
 static inline void print_debug_pcar(const char *strval, uint32_t val)
 {
-#if CONFIG_USE_INIT
+#if CONFIG_USE_PRINTK_IN_CAR
         printk_debug("%s%08x\r\n", strval, val);
 #else
         print_debug(strval); print_debug_hex32(val); print_debug("\r\n");
diff --git a/src/cpu/amd/model_fxx/fidvid.c b/src/cpu/amd/model_fxx/fidvid.c
index 255a6828ed..7b6c415893 100644
--- a/src/cpu/amd/model_fxx/fidvid.c
+++ b/src/cpu/amd/model_fxx/fidvid.c
@@ -1,6 +1,8 @@
 #if K8_SET_FIDVID == 1
 
-#define K8_SET_FIDVID_DEBUG 0 
+#define K8_SET_FIDVID_DEBUG 0
+
+#define K8_SET_FIDVID_ONE_BY_ONE 1
 
 #define K8_SET_FIDVID_STORE_AP_APICID_AT_FIRST 1
 
@@ -13,7 +15,7 @@
 static inline void print_debug_fv(const char *str, unsigned val)
 {
 #if K8_SET_FIDVID_DEBUG == 1
-        #if CONFIG_USE_INIT==1
+	#if CONFIG_USE_PRINTK_IN_CAR
         	printk_debug("%s%x\r\n", str, val);
         #else
                 print_debug(str); print_debug_hex32(val); print_debug("\r\n");
@@ -24,7 +26,7 @@ static inline void print_debug_fv(const char *str, unsigned val)
 static inline void print_debug_fv_8(const char *str, unsigned val)
 {
 #if K8_SET_FIDVID_DEBUG == 1
-        #if CONFIG_USE_INIT==1
+	#if CONFIG_USE_PRINTK_IN_CAR
                 printk_debug("%s%02x\r\n", str, val);
         #else
                 print_debug(str); print_debug_hex8(val); print_debug("\r\n");
@@ -35,7 +37,7 @@ static inline void print_debug_fv_8(const char *str, unsigned val)
 static inline void print_debug_fv_64(const char *str, unsigned val, unsigned val2)
 {
 #if K8_SET_FIDVID_DEBUG == 1
-        #if CONFIG_USE_INIT==1
+	#if CONFIG_USE_PRINTK_IN_CAR
                 printk_debug("%s%x%x\r\n", str, val, val2);
         #else
                 print_debug(str); print_debug_hex32(val); print_debug_hex32(val2); print_debug("\r\n");
@@ -75,6 +77,25 @@ static void enable_fid_change(void)
 	}
 }
 
+#if K8_SET_FIDVID_ONE_BY_ONE == 0
+static unsigned set_fidvid_without_init(unsigned fidvid)
+{
+
+        msr_t msr;
+        uint32_t vid;
+        uint32_t fid;
+
+        fid = (fidvid >> 8) & 0x3f;
+        vid = (fidvid >> 16) & 0x3f;
+
+        // set new FID/VID
+        msr.hi = 1;
+        msr.lo = (vid<<8) | fid;
+        wrmsr(0xc0010041, msr);
+        return fidvid;
+}
+#endif
+
 static unsigned set_fidvid(unsigned apicid, unsigned fidvid, int showmessage)
 {
 	//for (cur, new) there is one <1600MHz x8 to find out next_fid 
@@ -109,7 +130,7 @@ static unsigned set_fidvid(unsigned apicid, unsigned fidvid, int showmessage)
 	apicidx = lapicid();
 
 	if(apicid!=apicidx) {
-#if CONFIG_USE_INIT == 1
+#if CONFIG_USE_PRINTK_IN_CAR	
 		printk_err("wrong apicid, we want change %x, but it is %x\r\n", apicid, apicidx);
 #else
 		print_err("wrong apicid, we want change "); print_err_hex8(apicid); print_err(" but it is "); print_err_hex8(apicidx); print_err("\r\n");
@@ -228,8 +249,11 @@ static unsigned set_fidvid(unsigned apicid, unsigned fidvid, int showmessage)
 	fidvid = (vid_cur<< 16) | (fid_cur<<8);
 
 	if(showmessage) {
-		if((fid!=fid_cur) || (vid!=vid_cur)) {
-			print_err("set fidvid failed\r\n");
+		if(vid!=vid_cur) {
+			print_err("set vid failed for apicid ="); print_err_hex8(apicidx);  print_err("\r\n");
+		}
+		if(fid!=fid_cur) {
+			print_err("set fid failed for apicid ="); print_err_hex8(apicidx); print_err("\r\n");
 		}
 	}
 
@@ -241,7 +265,8 @@ static void init_fidvid_ap(unsigned bsp_apicid, unsigned apicid)
 {
 
 	uint32_t send;
-        uint32_t readback;
+        uint32_t readback = 0;
+	unsigned timeout = 1;
 	msr_t msr;
         uint32_t vid_cur;
         uint32_t fid_cur;
@@ -263,6 +288,7 @@ static void init_fidvid_ap(unsigned bsp_apicid, unsigned apicid)
         send |= ((msr.hi>>(48-32)) & 0x3f) << 16; //max vid
 	send |= (apicid<<24); // ap apicid
 
+#if K8_SET_FIDVID_ONE_BY_ONE == 1
         vid_cur = msr.hi & 0x3f;
         fid_cur = msr.lo & 0x3f;
 
@@ -270,13 +296,17 @@ static void init_fidvid_ap(unsigned bsp_apicid, unsigned apicid)
         msr.hi = 1;
         msr.lo = (vid_cur<<8) | (fid_cur);
         wrmsr(0xc0010041, msr);
+#endif
 
-	wait_cpu_state(bsp_apicid, 1);
+	timeout = wait_cpu_state(bsp_apicid, 1);
+	if(timeout) {
+	        print_initcpu8("fidvid_ap_stage1: time out while reading from BSP on ", apicid);
+	}
         //send signal to BSP about this AP max fid and vid
         lapic_write(LAPIC_MSG_REG, send | 1); //AP at state 1 that sent our fid and vid
 
 //	wait_cpu_state(bsp_apicid, 2);// don't need we can use apicid directly	
-	loop = 100000;
+	loop = 1000000;
         while(--loop>0) {
 		//remote read BSP signal that include vid and fid that need to set
                 if(lapic_remote_read(bsp_apicid, LAPIC_MSG_REG, &readback)!=0) continue;
@@ -284,14 +314,23 @@ static void init_fidvid_ap(unsigned bsp_apicid, unsigned apicid)
         }
 
 	if(loop>0) {
+	#if K8_SET_FIDVID_ONE_BY_ONE == 1
        		readback = set_fidvid(apicid, readback & 0xffff00, 1); // this AP
+	#else
+		readback = set_fidvid_without_init(readback & 0xffff00); // this AP
+	#endif
        		//send signal to BSP that this AP fid/vid is set // allow to change state2 is together with apicid
 	        send = (apicid<<24) | (readback & 0x00ffff00); // AP at state that We set the requested fid/vid
+	} else {
+	        print_initcpu8("fidvid_ap_stage2: time out while reading from BSP on ", apicid);
 	}
 
        	lapic_write(LAPIC_MSG_REG, send | 2);
 
-	wait_cpu_state(bsp_apicid, 3);
+	timeout = wait_cpu_state(bsp_apicid, 3);
+	if(timeout) {
+	        print_initcpu8("fidvid_ap_stage3: time out while reading from BSP on ", apicid);
+	}
 }
 
 static unsigned calc_common_fidvid(unsigned fidvid, unsigned fidvidx)
@@ -311,18 +350,26 @@ struct fidvid_st {
 
 static void init_fidvid_bsp_stage1(unsigned ap_apicid, void *gp ) 
 {		
-		unsigned readback;
+		unsigned readback = 0;
+		unsigned timeout = 1;
 
 		struct fidvid_st *fvp = gp;
 		int loop;
 		
                 print_debug_fv("state 1: ap_apicid=", ap_apicid);
 
-		loop = 100000;
+		loop = 1000000;
                 while(--loop > 0) {
   	              if(lapic_remote_read(ap_apicid, LAPIC_MSG_REG, &readback)!=0) continue;
-                      if((readback & 0xff) == 1) break; //target ap is in stage 1 
+                      if((readback & 0xff) == 1) {
+				timeout = 0;
+				break; //target ap is in stage 1 
+		      }
                 }
+		if(timeout) {
+		        print_initcpu8("fidvid_bsp_stage1: time out while reading from ap ", ap_apicid);
+			return;
+		}
 
                 print_debug_fv("\treadback=", readback);
 
@@ -333,7 +380,8 @@ static void init_fidvid_bsp_stage1(unsigned ap_apicid, void *gp )
 }
 static void init_fidvid_bsp_stage2(unsigned ap_apicid, void *gp)
 {
-		unsigned readback;
+		unsigned readback = 0;
+		unsigned timeout = 1;
 
 		struct fidvid_st *fvp = gp;
 		int loop;
@@ -342,12 +390,20 @@ static void init_fidvid_bsp_stage2(unsigned ap_apicid, void *gp)
 
                 lapic_write(LAPIC_MSG_REG, fvp->common_fidvid | (ap_apicid<<24) | 2); // all set to state2
 		
-		loop = 100000;	
+		loop = 1000000;	
                 while(--loop > 0) {
                 	if(lapic_remote_read(ap_apicid, LAPIC_MSG_REG, &readback)!=0) continue;
-                        if((readback & 0xff) == 2) break; // target ap is stage 2, and it'd FID has beed set
+                        if((readback & 0xff) == 2) { 
+				timeout = 0;
+				break; // target ap is stage 2, and it'd FID has beed set
+			}
                 }
 
+		if(timeout) {
+		        print_initcpu8("fidvid_bsp_stage2: time out while reading from ap ", ap_apicid);
+			return;
+		}
+
                 print_debug_fv("\treadback=", readback);
 }
 
@@ -438,11 +494,13 @@ static void init_fidvid_bsp(unsigned bsp_apicid)
 
 #endif
 
+#if K8_SET_FIDVID_ONE_BY_ONE == 1 
         // set BSP fid and vid
 	print_debug_fv("bsp apicid=", bsp_apicid);
 	fv.common_fidvid = set_fidvid(bsp_apicid, fv.common_fidvid, 1);
         print_debug_fv("common_fidvid=", fv.common_fidvid);
 
+#endif
 
         //for all APs ( We know the APIC ID of all AP even the APIC ID is lifted)
         // send signal to the AP it could change it's fid/vid
@@ -459,6 +517,14 @@ static void init_fidvid_bsp(unsigned bsp_apicid)
 	for_each_ap(bsp_apicid, K8_SET_FIDVID_CORE0_ONLY, init_fidvid_bsp_stage2, &fv);
 #endif
 
+#if K8_SET_FIDVID_ONE_BY_ONE == 0
+        // set BSP fid and vid
+	print_debug_fv("bsp apicid=", bsp_apicid);
+	fv.common_fidvid = set_fidvid(bsp_apicid, fv.common_fidvid, 1);
+	print_debug_fv("common_fidvid=", fv.common_fidvid);
+
+#endif
+
 	lapic_write(LAPIC_MSG_REG, fv.common_fidvid | (bsp_apicid<<24) | 3); // clear the state
 
 	//here  wait a while, so last ap could read pack, and stop it, don't call init_timer too early or just don't use init_timer
diff --git a/src/cpu/amd/model_fxx/init_cpus.c b/src/cpu/amd/model_fxx/init_cpus.c
index 4e38a23be0..d41001350c 100644
--- a/src/cpu/amd/model_fxx/init_cpus.c
+++ b/src/cpu/amd/model_fxx/init_cpus.c
@@ -16,7 +16,7 @@
 
 static inline void print_initcpu8 (const char *strval, unsigned val)
 {
-#if CONFIG_USE_INIT
+#if CONFIG_USE_PRINTK_IN_CAR
         printk_debug("%s%02x\r\n", strval, val);
 #else
         print_debug(strval); print_debug_hex8(val); print_debug("\r\n");
@@ -25,7 +25,7 @@ static inline void print_initcpu8 (const char *strval, unsigned val)
 
 static inline void print_initcpu8_nocr (const char *strval, unsigned val)
 {
-#if CONFIG_USE_INIT
+#if CONFIG_USE_PRINTK_IN_CAR
         printk_debug("%s%02x", strval, val);
 #else
         print_debug(strval); print_debug_hex8(val);
@@ -35,7 +35,7 @@ static inline void print_initcpu8_nocr (const char *strval, unsigned val)
 
 static inline void print_initcpu16 (const char *strval, unsigned val)
 {
-#if CONFIG_USE_INIT
+#if CONFIG_USE_PRINTK_IN_CAR
         printk_debug("%s%04x\r\n", strval, val);
 #else
         print_debug(strval); print_debug_hex16(val); print_debug("\r\n");
@@ -44,7 +44,7 @@ static inline void print_initcpu16 (const char *strval, unsigned val)
 
 static inline void print_initcpu(const char *strval, unsigned val)
 {
-#if CONFIG_USE_INIT
+#if CONFIG_USE_PRINTK_IN_CAR
         printk_debug("%s%08x\r\n", strval, val);
 #else
         print_debug(strval); print_debug_hex32(val); print_debug("\r\n");
@@ -171,30 +171,48 @@ static void init_fidvid_ap(unsigned bsp_apicid, unsigned apicid);
 
 static inline __attribute__((always_inline)) void print_apicid_nodeid_coreid(unsigned apicid, struct node_core_id id, const char *str)
 {
-	#if CONFIG_USE_INIT == 0
+	#if CONFIG_USE_PRINTK_IN_CAR
+                printk_debug("%s --- {  APICID = %02x NODEID = %02x COREID = %02x} ---\r\n", str, apicid, id.nodeid, id.coreid);
+	#else
 		print_debug(str);
         	print_debug(" ---- {APICID = "); print_debug_hex8(apicid);
 		print_debug(" NODEID = "), print_debug_hex8(id.nodeid); print_debug(" COREID = "), print_debug_hex8(id.coreid);
 	        print_debug("} --- \r\n");
-        #else
-                printk_debug("%s --- {  APICID = %02x NODEID = %02x COREID = %02x} ---\r\n", str, apicid, id.nodeid, id.coreid);
         #endif
 }
 
 
-static void wait_cpu_state(unsigned apicid, unsigned state)
+static unsigned wait_cpu_state(unsigned apicid, unsigned state)
 {
-        unsigned readback;
-	int loop =100000;
+        unsigned readback = 0;
+	unsigned timeout = 1;
+	int loop = 2000000;
         while(--loop>0) {
                 if(lapic_remote_read(apicid, LAPIC_MSG_REG, &readback)!=0) continue;
-                if((readback & 0xff) == state) break; //target cpu is in stage started
+                if((readback & 0xff) == state) {
+			timeout = 0;
+			break; //target cpu is in stage started
+		}
         }
+	if(timeout) {
+		if(readback) {
+			timeout = readback;
+		}
+	}
+
+	return timeout;
 }
 static void wait_ap_started(unsigned ap_apicid, void *gp )
 {
-        wait_cpu_state(ap_apicid, 0x33); // started
-        print_initcpu8_nocr(" ", ap_apicid);
+	unsigned timeout;
+        timeout = wait_cpu_state(ap_apicid, 0x33); // started
+	if(timeout) {
+	        print_initcpu8_nocr("*", ap_apicid);
+	        print_initcpu("*", timeout);
+	}
+	else {
+        	print_initcpu8_nocr(" ", ap_apicid);
+	}
 }
 
 static void wait_all_aps_started(unsigned bsp_apicid)
@@ -219,18 +237,17 @@ static void STOP_CAR_AND_CPU(void)
 	disable_cache_as_ram(); // inline
 	stop_this_cpu(); // inline, it will stop all cores except node0/core0 the bsp ....
 }
-#if RAMINIT_SYSINFO == 1
 
-#if MEM_TRAIN_SEQ != 1
-static inline void train_ram_on_node(unsigned nodeid, unsigned coreid, struct sys_info *sysinfo, unsigned retcall) {}
-#else
-static inline void train_ram_on_node(unsigned nodeid, unsigned coreid, struct sys_info *sysinfo, unsigned retcall); 
+#ifndef MEM_TRAIN_SEQ
+#define MEM_TRAIN_SEQ 0
 #endif
 
+
+#if MEM_TRAIN_SEQ == 1
+static inline void train_ram_on_node(unsigned nodeid, unsigned coreid, struct sys_info *sysinfo, unsigned retcall); 
 #endif
 
 #if RAMINIT_SYSINFO == 1
-
 static unsigned init_cpus(unsigned cpu_init_detectedx ,struct sys_info *sysinfo)
 #else
 static unsigned init_cpus(unsigned cpu_init_detectedx)
@@ -311,6 +328,8 @@ static unsigned init_cpus(unsigned cpu_init_detectedx)
 		lapic_write(LAPIC_MSG_REG, (apicid<<24) | 0x33); // mark the cpu is started
 
 		if(apicid != bsp_apicid) {
+			unsigned timeout=1;
+			unsigned loop = 100;
 	#if K8_SET_FIDVID == 1
 		#if (CONFIG_LOGICAL_CPUS == 1) && (K8_SET_FIDVID_CORE0_ONLY == 1)
 			if(id.coreid == 0 ) // only need set fid for core0
@@ -319,10 +338,15 @@ static unsigned init_cpus(unsigned cpu_init_detectedx)
 	#endif
 
                        // We need to stop the CACHE as RAM for this CPU, really?
-                        wait_cpu_state(bsp_apicid, 0x44);
+			while(timeout && (loop-->0)) {	
+	                        timeout = wait_cpu_state(bsp_apicid, 0x44);
+			}
+			if(timeout) {
+			        print_initcpu8("while waiting for BSP signal to STOP, timeout in ap ", apicid);
+			}
                         lapic_write(LAPIC_MSG_REG, (apicid<<24) | 0x44); // bsp can not check it before stop_this_cpu
                         set_init_ram_access();
-	#if RAMINIT_SYSINFO == 1
+	#if MEM_TRAIN_SEQ == 1
 			train_ram_on_node(id.nodeid, id.coreid, sysinfo, STOP_CAR_AND_CPU);
 	#endif
 
diff --git a/src/cpu/amd/model_fxx/model_fxx_init.c b/src/cpu/amd/model_fxx/model_fxx_init.c
index 9e0ba84802..f97f68672f 100644
--- a/src/cpu/amd/model_fxx/model_fxx_init.c
+++ b/src/cpu/amd/model_fxx/model_fxx_init.c
@@ -686,9 +686,12 @@ static struct cpu_device_id cpu_table[] = {
         { X86_VENDOR_AMD, 0x40fb2 }, /* BH-F2      Socket AM2:Athlon64 x2/ Mobile Athlon64 x2 */
 	{ X86_VENDOR_AMD, 0x40f82 }, 		/* 	  S1g1:Turion64 x2 */
         { X86_VENDOR_AMD, 0x40ff2 }, /* DH-F2      Socket AM2: Athlon64 */
+        { X86_VENDOR_AMD, 0x50ff2 }, /* DH-F2      Socket AM2: Athlon64 */
         { X86_VENDOR_AMD, 0x40fc2 },            /*        S1g1:Turion64 */
         { X86_VENDOR_AMD, 0x40f13 }, /* JH-F3      Socket F (1207): Opteron Dual Core */
         { X86_VENDOR_AMD, 0x40f33 },            /*        AM2 : Opteron Dual Core/Athlon64 x2/ Athlon64 FX Dual Core */
+        { X86_VENDOR_AMD, 0xc0f13 },            /*        AM2 : Athlon64 FX*/
+        { X86_VENDOR_AMD, 0x50ff3 }, /* DH-F3      Socket AM2: Athlon64 */
 #endif
 
 	{ 0, 0 },