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| author | Duncan Laurie <dlaurie@chromium.org> | 2012-06-23 15:09:34 -0700 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2012-07-24 23:40:54 +0200 |
| commit | d2e00b92ce0d3b60b7467ff51d3184d9c57dcb10 (patch) | |
| tree | 7d7b280ca407dce51a898344d0c0928df73b514f /src/cpu | |
| parent | 4e4320f524a4695b5987e6bbffcfc48af89dac26 (diff) | |
| download | coreboot-d2e00b92ce0d3b60b7467ff51d3184d9c57dcb10.tar.xz | |
SMM: Add heap region and move C handler higher in region
In order to support SPI and ELOG drivers the SMM region
needs to be able to be larger than the previous allocation
below 0x7400. Now that we have support for 4M TSEG we do
not need to live in this region.
This change adds a 16KB heap region abofe the save state area
at TSEG+64KB and moves the C handler above this.
The heap region is then available for malloc and the C handler
can grow to support flash and event log features.
While updating the memory map comment in assembly stub I also
added a pause instruction to the cpu spin lock as this was
added to the C code in latest upstream rebase.
Dump sympbols from smm.elf binary to see the new regions:
00010000 B _heap
00014000 B _eheap
00014000 T _smm_c_handler_start
0001b240 T _smm_c_handler_end
Change-Id: I45f0ab4df1fdef3b626f877094a58587476ac634
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/1308
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/x86/smm/smm_tseg.ld | 45 | ||||
| -rw-r--r-- | src/cpu/x86/smm/smmhandler_tseg.S | 9 |
2 files changed, 36 insertions, 18 deletions
diff --git a/src/cpu/x86/smm/smm_tseg.ld b/src/cpu/x86/smm/smm_tseg.ld index 016b5a0fcf..6def972949 100644 --- a/src/cpu/x86/smm/smm_tseg.ld +++ b/src/cpu/x86/smm/smm_tseg.ld @@ -10,6 +10,34 @@ SECTIONS .handler (.): { /* Assembler stub */ *(.handler) + } + + /* We are using the TSEG interleaved to stuff the SMM handlers + * for all CPU cores in there. The jump table redirects the execution + * to the actual SMM handler + */ + . = 0x8000 - (( CPUS - 1) * 0x400); + .jumptable : { + *(.jumptable) + } + + /* Data used in early SMM TSEG handler. */ + . = 0x8400; + .earlydata : { + *(.earlydata) + } + + /* 16KB for the heap at 64KB */ + . = 0x10000; + .heap : { + _heap = .; + . = 0x4000; + _eheap = .; + } + + . = ALIGN(0x4000); + .smm_c_handler : { + _smm_c_handler_start = .; /* C code of the SMM handler */ *(.text); @@ -29,25 +57,10 @@ SECTIONS . = ALIGN(4); *(.bss) *(.sbss) - - /* What is this? */ *(COMMON) . = ALIGN(4); - } - /* We are using the TSEG interleaved to stuff the SMM handlers - * for all CPU cores in there. The jump table redirects the execution - * to the actual SMM handler - */ - . = 0x8000 - (( CPUS - 1) * 0x400); - .jumptable : { - *(.jumptable) - } - - /* Data used in early SMM TSEG handler. */ - . = 0x8400; - .earlydata : { - *(.earlydata) + _smm_c_handler_end = .; } /DISCARD/ : { diff --git a/src/cpu/x86/smm/smmhandler_tseg.S b/src/cpu/x86/smm/smmhandler_tseg.S index 8fdd75fb17..c61a611757 100644 --- a/src/cpu/x86/smm/smmhandler_tseg.S +++ b/src/cpu/x86/smm/smmhandler_tseg.S @@ -20,7 +20,11 @@ */ /* - * +--------------------------------+ 0xffff + * +--------------------------------+ + * | SMM Handler C Code | + * +--------------------------------+ 0x14000 + * | SMM Handler Heap | + * +--------------------------------+ 0x10000 * | Save State Map Node 0 | * | Save State Map Node 1 | * | Save State Map Node 2 | @@ -39,7 +43,7 @@ * | ... | * +--------------------------------+ 0x7400 * | | - * | SMM Handler | + * | SMM Handler Assembly Stub | * | | * +--------------------------------+ TSEG * @@ -91,6 +95,7 @@ smm_handler_start: /* If we did not get the lock, wait for release */ wait_for_unlock: + pause addr32 movw (%ebx), %ax cmpw $SMI_LOCKED, %ax je wait_for_unlock |