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authorXavi Drudis Ferran <xdrudis@tinet.cat>2011-02-28 02:33:59 +0000
committerMarc Jones <marc.jones@amd.com>2011-02-28 02:33:59 +0000
commite485aa496b2230226abf2255837b9e1d422e9b42 (patch)
tree1991d76df98dd21f6b559084b6b665860ae8ef6d /src/cpu
parent6fcc961fe846aca897480bb637142d50914a4ea7 (diff)
downloadcoreboot-e485aa496b2230226abf2255837b9e1d422e9b42.tar.xz
Improving BKDG implementation of P-states,
CPU and northbridge frequency and voltage handling for Fam 10 in SVI mode. Contemplate the possibility of nbCofVidUpdate not being defined, trying to get closer to BKDG Signed-off-by: Xavi Drudis Ferran <xdrudis@tinet.cat> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6399 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/amd/model_10xxx/fidvid.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/src/cpu/amd/model_10xxx/fidvid.c b/src/cpu/amd/model_10xxx/fidvid.c
index ea10269c0c..13416f7bc2 100644
--- a/src/cpu/amd/model_10xxx/fidvid.c
+++ b/src/cpu/amd/model_10xxx/fidvid.c
@@ -631,7 +631,11 @@ static u32 needs_NB_COF_VID_update(void)
nodes = get_nodes();
nb_cof_vid_update = 0;
for (i = 0; i < nodes; i++) {
- if (pci_read_config32(NODE_PCI(i, 3), 0x1FC) & 1) {
+ u32 cpuRev = mctGetLogicalCPUID(i) ;
+ u32 nbCofVidUpdateDefined = (cpuRev & (AMD_FAM10_LT_D));
+ if (nbCofVidUpdateDefined
+ && (pci_read_config32(NODE_PCI(i, 3), 0x1FC)
+ & NB_COF_VID_UPDATE_MASK)) {
nb_cof_vid_update = 1;
break;
}