diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-03-09 20:08:15 +0200 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-08-02 04:48:20 +0000 |
commit | 21e609c1c92c47bd8990c2ce25adf5987b5dd1b2 (patch) | |
tree | 62f5cb8577d9e62fc44cd8da69ac396230ab1e8c /src/cpu | |
parent | ed8d2777f8c363d40abe51576a285a6fecf7ee3e (diff) | |
download | coreboot-21e609c1c92c47bd8990c2ce25adf5987b5dd1b2.tar.xz |
AGESA: Move romstage-ramstage splitline
In AGESA specification AmdInitEnv() is to be called once
host memory allocator has started. In coreboot context this
could mean either availability of CBMEM or malloc heap.
As for AmdS3LateRestore(), there is no requirement to have
it run as part of the romstage either.
Change-Id: Icc8d97b82df89e2480e601d5c2e094de0365b0a5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/18888
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/amd/agesa/romstage.c | 9 |
1 files changed, 1 insertions, 8 deletions
diff --git a/src/cpu/amd/agesa/romstage.c b/src/cpu/amd/agesa/romstage.c index fc4a0b488c..54ef602d20 100644 --- a/src/cpu/amd/agesa/romstage.c +++ b/src/cpu/amd/agesa/romstage.c @@ -109,15 +109,8 @@ void asmlinkage romstage_after_car(void) fill_sysinfo(cb); - if (!HAS_LEGACY_WRAPPER) { - if (!cb->s3resume) - agesa_execute_state(cb, AMD_INIT_ENV); - else - agesa_execute_state(cb, AMD_S3LATE_RESTORE); - } else { - + if (HAS_LEGACY_WRAPPER) agesa_postcar(cb); - } if (cb->s3resume) set_resume_cache(); |