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| author | Patrick Georgi <patrick@georgi-clan.de> | 2011-10-22 09:54:36 +0200 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2011-10-28 22:17:36 +0200 |
| commit | 914377efd61be7b473faca0e6bdfca6f3feb5dc5 (patch) | |
| tree | 67343ca5bcc65f7a42862da821efa3b3b945e362 /src/cpu | |
| parent | 1da104647dc2828a6594bdc7b5ae119923dbcffa (diff) | |
| download | coreboot-914377efd61be7b473faca0e6bdfca6f3feb5dc5.tar.xz | |
Get rid of the old romstage-as-bootblock ROM layout
This change removes CONFIG_TINY_BOOTBLOCK, CONFIG_BIG_BOOTBLOCK, and
all their uses, assuming TINY_BOOTBLOCK=y, BIG_BOOTBLOCK=n.
This might break a couple of boards on runtime, but so far, fixes were
quite simple.
There's a flag day: Code that relies on CONFIG_TINY_BOOTBLOCK must be
adapted.
Change-Id: I1e17a4a1b9c9adb8b43ca4db8aed5a6d44d645f5
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/320
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/intel/socket_FC_PGA370/Kconfig | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/cpu/intel/socket_FC_PGA370/Kconfig b/src/cpu/intel/socket_FC_PGA370/Kconfig index 88541a8379..37a58d0039 100644 --- a/src/cpu/intel/socket_FC_PGA370/Kconfig +++ b/src/cpu/intel/socket_FC_PGA370/Kconfig @@ -24,7 +24,6 @@ config CPU_INTEL_SOCKET_FC_PGA370 select MMX select SSE select CACHE_AS_RAM - select TINY_BOOTBLOCK config DCACHE_RAM_SIZE hex |