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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-11-20 20:39:56 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-12-01 19:17:05 +0100 |
| commit | 91bfa8e7eaf7a91c47a3e86c35ffe2135aa0cd8f (patch) | |
| tree | 48bf34401bd3a82c5f85f0a240651e8dee608838 /src/device/Kconfig | |
| parent | df96a702ba98c1b85e8b4657498e76ec9f543447 (diff) | |
| download | coreboot-91bfa8e7eaf7a91c47a3e86c35ffe2135aa0cd8f.tar.xz | |
PCIEXP_PLUGIN_SUPPORT: Change dependency on PCI access
Some PCI-e capability registers are located starting from
0x100, these are not accessible using the conventional
PCI IO config operations at 0xcf8/0xcfc, unless PCI_CFG_EXT_IO
was selected.
Thus any feature that calls pciexp_find_extended_cap()
depends on either MMCONF_SUPPORT_DEFAULT or PCI_CFG_EXT_IO
being enabled on the platform.
In theory there can be system without MMCONF_SUPPORT, but
with complete PCI Express configuration space available
using PCI_CFG_EXT_IO. Do not use explicit PCI MMCONF
operations here, but rely on the default PCI access
method to be able to access all of the configuration space.
While at it, convert to IS_ENABLED() everywhere in the source
and organize Kconfig file better.
Change-Id: Ica6e16d2fb2adc532e644c4b2c47806490235715
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17546
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/device/Kconfig')
| -rw-r--r-- | src/device/Kconfig | 33 |
1 files changed, 17 insertions, 16 deletions
diff --git a/src/device/Kconfig b/src/device/Kconfig index dd31cba4fd..fb0aaba2ca 100644 --- a/src/device/Kconfig +++ b/src/device/Kconfig @@ -227,11 +227,6 @@ config PCIX_PLUGIN_SUPPORT depends on PCI default y -config PCIEXP_PLUGIN_SUPPORT - bool - depends on PCI - default y - config CARDBUS_PLUGIN_SUPPORT bool depends on PCI @@ -242,10 +237,16 @@ config AZALIA_PLUGIN_SUPPORT depends on PCI default n +config PCIEXP_PLUGIN_SUPPORT + bool + depends on PCI + default y + +if PCIEXP_PLUGIN_SUPPORT + config PCIEXP_COMMON_CLOCK prompt "Enable PCIe Common Clock" bool - depends on PCIEXP_PLUGIN_SUPPORT default n help Detect and enable Common Clock on PCIe links. @@ -253,7 +254,6 @@ config PCIEXP_COMMON_CLOCK config PCIEXP_ASPM prompt "Enable PCIe ASPM" bool - depends on PCIEXP_PLUGIN_SUPPORT default n help Detect and enable ASPM on PCIe links. @@ -261,11 +261,20 @@ config PCIEXP_ASPM config PCIEXP_CLK_PM prompt "Enable PCIe Clock Power Management" bool - depends on PCIEXP_PLUGIN_SUPPORT default n help Detect and enable Clock Power Management on PCIe. +config PCIEXP_L1_SUB_STATE + prompt "Enable PCIe ASPM L1 SubState" + bool + depends on (MMCONF_SUPPORT_DEFAULT || PCI_IO_CFG_EXT) + default n + help + Detect and enable ASPM on PCIe links. + +endif # PCIEXP_PLUGIN_SUPPORT + config EARLY_PCI_BRIDGE bool "Early PCI bridge" depends on PCI @@ -278,14 +287,6 @@ config EARLY_PCI_BRIDGE This option enables static configuration for a single pre-defined PCI bridge function on bus 0. -config PCIEXP_L1_SUB_STATE - prompt "Enable PCIe ASPM L1 SubState" - bool - depends on PCIEXP_PLUGIN_SUPPORT && MMCONF_SUPPORT - default n - help - Detect and enable ASPM on PCIe links. - if EARLY_PCI_BRIDGE config EARLY_PCI_BRIDGE_DEVICE |