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| author | Lee Leahy <leroy.p.leahy@intel.com> | 2015-03-31 17:30:01 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-22 08:55:29 +0200 |
| commit | e1ba3dac415b87dc9e3f038ced0a1a720a4d8004 (patch) | |
| tree | 3bce13ff82aff60451a9fd1db4003741cd3d5f40 /src/device/Makefile.inc | |
| parent | 3486736a992f2444677568653e80abb535fb038a (diff) | |
| download | coreboot-e1ba3dac415b87dc9e3f038ced0a1a720a4d8004.tar.xz | |
device: Add class and subclass name support
Add support to display class and subclass names for PCI devices.
BRANCH=none
BUG=None
TEST=Build and run on strago/cyan.
Change-Id: I5136fae45b8a1cd02541f233d29a246cdfcd8331
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: a7c9b0d7201b09a06ea32f0db84187d15f767c80
Original-Change-Id: Ibf2ee89dd84040ca6ab0e52857a69f7ed0c28f37
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/263342
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Leroy P Leahy <leroy.p.leahy@intel.com>
Original-Tested-by: Leroy P Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/9901
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/device/Makefile.inc')
| -rw-r--r-- | src/device/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/device/Makefile.inc b/src/device/Makefile.inc index a955bb4350..391811515e 100644 --- a/src/device/Makefile.inc +++ b/src/device/Makefile.inc @@ -2,6 +2,7 @@ ramstage-y += device.c ramstage-y += root_device.c ramstage-y += cpu_device.c ramstage-y += device_util.c +ramstage-$(CONFIG_PCI) += pci_class.c ramstage-$(CONFIG_PCI) += pci_device.c ramstage-$(CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT) += hypertransport.c ramstage-$(CONFIG_PCIX_PLUGIN_SUPPORT) += pcix_device.c |