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authorSubrata Banik <subrata.banik@intel.com>2018-10-31 13:51:07 +0530
committerSubrata Banik <subrata.banik@intel.com>2018-11-17 09:37:09 +0000
commit990db2213f5e69974e6334f001aa847d1def718a (patch)
treee585706549006c2c29de4f3054f6d3c0387e01da /src/device/hypertransport.c
parentc2e494136731571a78b2bdd7ca9dc536a8b5aecd (diff)
downloadcoreboot-990db2213f5e69974e6334f001aa847d1def718a.tar.xz
soc/intel/icelake: Make static IRQ mapping for ICP PCH pci devices
Since PIRQ->IRQ mapping registers PxRC are not available after FSP-S call due to PCH requirement change from CNP PCH onwards, hence making static IRQ mapping for pci_irqs.asl and pcie.asl Also remove unused irqlinks.asl from soc/intel/icelake/acpi/ Change-Id: Idec00c3b8a97cb5aa7b4000840aba914aea478c9 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/29508 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/device/hypertransport.c')
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