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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2017-09-13 17:47:31 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-09-27 16:26:40 +0000 |
| commit | b617211910e9c6ff4e3cd92f022ef052a65559a3 (patch) | |
| tree | efd458f6fc7f5c4d66df78938f8c9c3767f6783e /src/device/pci_device.c | |
| parent | f7bcc180eb5aa297aa3e8ff9a3968414a238395a (diff) | |
| download | coreboot-b617211910e9c6ff4e3cd92f022ef052a65559a3.tar.xz | |
amd/stoneyridge: Enable SMM in TSEG
Add necessary features to allow mp_init_with_smm() to install and
relocate an SMM handler.
SMM region functions are added to easily identify the SMM attributes.
Adjust the neighboring cbmem_top() rounding downward to better reflect
the default TSEG size. Add relocation attributes to be set by each
core a relocation handler.
Modify the definition of smi_southbridge_handler() to match TSEG
prototype.
BUG=b:62103112
Change-Id: I4dc03ed27d0d109ab919a4f0861de9c7420d03ce
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/21501
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/device/pci_device.c')
0 files changed, 0 insertions, 0 deletions