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authorMartin Roth <martinroth@chromium.org>2018-03-06 16:10:45 -0700
committerPatrick Georgi <pgeorgi@google.com>2018-03-08 18:14:54 +0000
commit5dd4a2a4b081caa1c7b2e871067a0ac1b9bff7ed (patch)
tree3a27cfe7a236da24e7d4af3c915b901d51d41036 /src/device/pci_device.c
parentb3b47e1a8519b8d61468a8b3afdfa2b87593d245 (diff)
downloadcoreboot-5dd4a2a4b081caa1c7b2e871067a0ac1b9bff7ed.tar.xz
timestamps: Add timestamps around the vbios load & init
Add timestamps before and after the vBIOS load and after the vBIOS run. This lets us see exactly how long it took to load it from the ROM chip, and how long it takes to run. BUG=b:64549506 TEST=Build & boot Grunt, see vBIOS load & initialization times. Change-Id: I878ba653eb086ad6c6614aa08a6d3fe216a9323e Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/25018 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/device/pci_device.c')
-rw-r--r--src/device/pci_device.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/device/pci_device.c b/src/device/pci_device.c
index 02eca66e27..c18f529fbe 100644
--- a/src/device/pci_device.c
+++ b/src/device/pci_device.c
@@ -48,6 +48,7 @@
#include <device/hypertransport.h>
#include <pc80/i8259.h>
#include <security/vboot/vbnv.h>
+#include <timestamp.h>
u8 pci_moving_config8(struct device *dev, unsigned int reg)
{
@@ -719,6 +720,7 @@ void pci_dev_init(struct device *dev)
if (!should_load_oprom(dev))
return;
+ timestamp_add_now(TS_OPROM_INITIALIZE);
rom = pci_rom_probe(dev);
if (rom == NULL)
@@ -727,6 +729,7 @@ void pci_dev_init(struct device *dev)
ram = pci_rom_load(dev, rom);
if (ram == NULL)
return;
+ timestamp_add_now(TS_OPROM_COPY_END);
if (!should_run_oprom(dev))
return;
@@ -734,6 +737,7 @@ void pci_dev_init(struct device *dev)
run_bios(dev, (unsigned long)ram);
gfx_set_init_done(1);
printk(BIOS_DEBUG, "VGA Option ROM was run\n");
+ timestamp_add_now(TS_OPROM_END);
}
/** Default device operation for PCI devices */