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| author | Tristan Shieh <tristan.shieh@mediatek.com> | 2019-01-30 09:45:52 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-31 08:38:31 +0000 |
| commit | d053f393c46c8a568f55c789e789e4e56026ad85 (patch) | |
| tree | 8eb2d63933f97b7d233dcf4555a90cd26cfb7959 /src/device/pci_early.c | |
| parent | 1f83e9d592f6be5a4fc36c7d21ae1410a2fbbdfe (diff) | |
| download | coreboot-d053f393c46c8a568f55c789e789e4e56026ad85.tar.xz | |
google/kukui: Set GPIO_RESET to output mode
In payloads, we didn't set GPIO modes. We have to set up GPIO mode in
coreboot for payloads.
BUG=b:80501386
BRANCH=none
TEST=HW reboot works in depthcharge
Change-Id: Ibd2c6c071871edc59497fbb245cdbec6a814f621
Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/31148
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/device/pci_early.c')
0 files changed, 0 insertions, 0 deletions