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authorMartin Roth <martinroth@chromium.org>2020-01-21 09:28:40 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-03-25 10:48:21 +0000
commita616a4be366c6af1f8ccfbfd1f16a4572c7e6c91 (patch)
tree1b890c4afbb9047482c19db93dd3ddadd2f76c65 /src/device/pci_rom.c
parent4cc2cacd333de4d77809f1212e879e61ff8e1616 (diff)
downloadcoreboot-a616a4be366c6af1f8ccfbfd1f16a4572c7e6c91.tar.xz
src/device: Add option to look at revision in option roms
AMD's Family 17h SOCs have the same vendor and device IDs for their graphics blocks, but need different video BIOSes. The only difference is the revision number. Add a Kconfig option that allows us to add the revision number of the graphics device to the PCI option rom saved in CBFS. Because searching CBFS takes a non-trivial amount of time, only enable the option if it's needed. If it's not used, or if nothing matches, the check will fall through and search for an option rom with no version. BUG=b:145817712 TEST=With surrounding patches, loads dali vbios Change-Id: Icb610a2abe7fcd0f4dc3716382b9853551240a7a Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/2013181 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39792 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/device/pci_rom.c')
-rw-r--r--src/device/pci_rom.c10
1 files changed, 8 insertions, 2 deletions
diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c
index 27f2d8dca2..6af20e854e 100644
--- a/src/device/pci_rom.c
+++ b/src/device/pci_rom.c
@@ -27,11 +27,17 @@ u32 __weak map_oprom_vendev(u32 vendev) { return vendev; }
struct rom_header *pci_rom_probe(struct device *dev)
{
- struct rom_header *rom_header;
+ struct rom_header *rom_header = NULL;
struct pci_data *rom_data;
/* If it's in FLASH, then don't check device for ROM. */
- rom_header = cbfs_boot_map_optionrom(dev->vendor, dev->device);
+ if (CONFIG(CHECK_REV_IN_OPROM_NAME)) {
+ uint8_t rev = pci_read_config8(dev, PCI_REVISION_ID);
+ rom_header = cbfs_boot_map_optionrom_revision(dev->vendor, dev->device, rev);
+ }
+
+ if (!rom_header)
+ rom_header = cbfs_boot_map_optionrom(dev->vendor, dev->device);
u32 vendev = (dev->vendor << 16) | dev->device;
u32 mapped_vendev;