diff options
| author | David Hendricks <dhendrix@chromium.org> | 2015-01-14 20:41:30 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-17 09:21:03 +0200 |
| commit | f9b49e8782efb7628984e1f3c3abc1ef7a58b84b (patch) | |
| tree | 40f9537f47a506e831e44c1bc10b467f48b45d26 /src/device/pci_rom.c | |
| parent | 92da778d32993b819b3a94e7b73046734647d661 (diff) | |
| download | coreboot-f9b49e8782efb7628984e1f3c3abc1ef7a58b84b.tar.xz | |
Add delay before reading GPIOs in gpio_base2_value()
This adds a 10us delay in between (re-)configuring and reading
GPIOs in gpio_base2_value() to give the values stored some time
to update.
As far as I know this hasn't bitten us since the function was
added, but adding a short delay here seems like the right thing
to do.
BUG=none
BRANCH=none
TEST=built and booted on Brain
Change-Id: I869cf375680435ad87729f93d29a623bdf09dfbc
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 2484900fc9ceba87220a293de8ef20c3b9b20cfd
Original-Signed-off-by: David Hendricks <dhendrix@chromium.org>
Original-Change-Id: I79616a09d8d2ce4e416ffc94e35798dd25a6250d
Original-Reviewed-on: https://chromium-review.googlesource.com/240854
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/9725
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/device/pci_rom.c')
0 files changed, 0 insertions, 0 deletions