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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2019-12-07 11:57:35 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-12-09 09:45:25 +0000 |
| commit | aeff512a507e01c8b9d0ba9b6099de4a53c85420 (patch) | |
| tree | 4db8a5cd150f148fba3d9d5b9b0ef16d8c14b418 /src/device/pciexp_device.c | |
| parent | c79efa822d8738d02bc989ef2b99a4dc0f6fb128 (diff) | |
| download | coreboot-aeff512a507e01c8b9d0ba9b6099de4a53c85420.tar.xz | |
src/device: Fix typo
Change-Id: Ibe99264a82fdea0e185907d2d2d4c57078ef3ae4
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37571
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/device/pciexp_device.c')
| -rw-r--r-- | src/device/pciexp_device.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/device/pciexp_device.c b/src/device/pciexp_device.c index 72aac4c7c5..c73c548bb4 100644 --- a/src/device/pciexp_device.c +++ b/src/device/pciexp_device.c @@ -165,7 +165,7 @@ static void pciexp_configure_ltr(struct device *dev) cap = pci_find_capability(dev, PCI_CAP_ID_PCIE); /* - * Check if capibility pointer is valid and + * Check if capability pointer is valid and * device supports LTR mechanism. */ if (!cap || !pciexp_is_ltr_supported(dev, cap)) { |