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| author | John Zhao <john.zhao@intel.com> | 2021-03-24 11:55:09 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-03-28 16:03:21 +0000 |
| commit | 6edbb18901565d60bc61fda9ac75da08cb94ff84 (patch) | |
| tree | 75915c7398933b6bcf2047342e63229d9c57981c /src/device | |
| parent | 56eb876c40205dacb48d2a942a9548e05ad6f0e0 (diff) | |
| download | coreboot-6edbb18901565d60bc61fda9ac75da08cb94ff84.tar.xz | |
ACPI: Add SATC structure for DMAR table
The SoC integrated address translation cache(SATC) reporting structure
is added to Virtualization Technology for Directed I/O specification
Rev3.2. This change adds an ACPI Name-Space Device Declaration structure
SATC which has type 5 reporting structure.
BUG=None
TEST=Built image successfully.
Signed-off-by: John Zhao <john.zhao@intel.com>
Change-Id: I91d1384083c98b75bcbdddd9cc7b7a26fab25d9d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51776
Reviewed-by: Lance Zhao
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/device')
0 files changed, 0 insertions, 0 deletions