diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-02-21 12:42:51 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-03-09 19:33:08 +0100 |
| commit | bf62b2ddb074c22738b5c9e8dc6c1ecb5d2e5e97 (patch) | |
| tree | fd9de8c29a036c266ed085350359fdf573b999b5 /src/device | |
| parent | 991a71d55c3099b01acb4b42e97d72aa64816898 (diff) | |
| download | coreboot-bf62b2ddb074c22738b5c9e8dc6c1ecb5d2e5e97.tar.xz | |
AMD fam10: Drop PCI_BUS_SEGN_BITS
All boards in tree use 0. Looks like this is all work that was
never completed and tested.
We also have static setting sysconf.segbit=0 which would conflict
with PCI_BUS_SEGN_BITS>0.
Having PCI_BUS_SEGN_BITS>0 would also require PCI MMCONF support
to cover over 255 buses.
Change-Id: I060efc44d1560541473b01690c2e8192863c1eb5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8554
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/device')
| -rw-r--r-- | src/device/Kconfig | 4 | ||||
| -rw-r--r-- | src/device/device_util.c | 28 | ||||
| -rw-r--r-- | src/device/pci_device.c | 5 |
3 files changed, 0 insertions, 37 deletions
diff --git a/src/device/Kconfig b/src/device/Kconfig index 42a68d296a..7f43888838 100644 --- a/src/device/Kconfig +++ b/src/device/Kconfig @@ -259,10 +259,6 @@ config PCIEXP_CLK_PM help Detect and enable Clock Power Management on PCIe. -config PCI_BUS_SEGN_BITS - int - default 0 - config EARLY_PCI_BRIDGE bool "Early PCI bridge" depends on PCI diff --git a/src/device/device_util.c b/src/device/device_util.c index 62a815f939..d970429ff2 100644 --- a/src/device/device_util.c +++ b/src/device/device_util.c @@ -251,20 +251,11 @@ const char *dev_path(device_t dev) memcpy(buffer, "Root Device", 12); break; case DEVICE_PATH_PCI: -#if CONFIG_PCI_BUS_SEGN_BITS - snprintf(buffer, sizeof (buffer), - "PCI: %04x:%02x:%02x.%01x", - dev->bus->secondary >> 8, - dev->bus->secondary & 0xff, - PCI_SLOT(dev->path.pci.devfn), - PCI_FUNC(dev->path.pci.devfn)); -#else snprintf(buffer, sizeof (buffer), "PCI: %02x:%02x.%01x", dev->bus->secondary, PCI_SLOT(dev->path.pci.devfn), PCI_FUNC(dev->path.pci.devfn)); -#endif break; case DEVICE_PATH_PNP: snprintf(buffer, sizeof (buffer), "PNP: %04x.%01x", @@ -643,14 +634,8 @@ void report_resource_stored(device_t dev, struct resource *resource, buf[0] = '\0'; if (resource->flags & IORESOURCE_PCI_BRIDGE) { -#if CONFIG_PCI_BUS_SEGN_BITS - snprintf(buf, sizeof (buf), - "bus %04x:%02x ", dev->bus->secondary >> 8, - dev->link_list->secondary & 0xff); -#else snprintf(buf, sizeof (buf), "bus %02x ", dev->link_list->secondary); -#endif } printk(BIOS_DEBUG, "%s %02lx <- [0x%010llx - 0x%010llx] size 0x%08llx " "gran 0x%02x %s%s%s\n", dev_path(dev), resource->index, @@ -855,19 +840,6 @@ void show_one_resource(int debug_level, struct device *dev, end = resource_end(resource); buf[0] = '\0'; -/* - if (resource->flags & IORESOURCE_BRIDGE) { -#if CONFIG_PCI_BUS_SEGN_BITS - snprintf(buf, sizeof (buf), "bus %04x:%02x ", - dev->bus->secondary >> 8, - dev->link[0].secondary & 0xff); -#else - snprintf(buf, sizeof (buf), - "bus %02x ", dev->link[0].secondary); -#endif - } -*/ - do_printk(debug_level, "%s %02lx <- [0x%010llx - 0x%010llx] " "size 0x%08llx gran 0x%02x %s%s%s\n", dev_path(dev), resource->index, base, end, resource->size, resource->gran, diff --git a/src/device/pci_device.c b/src/device/pci_device.c index 127ee32fe2..4651258ce8 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -1090,12 +1090,7 @@ unsigned int pci_scan_bus(struct bus *bus, unsigned min_devfn, struct device *old_devices; struct device *child; -#if CONFIG_PCI_BUS_SEGN_BITS - printk(BIOS_DEBUG, "PCI: pci_scan_bus for bus %04x:%02x\n", - bus->secondary >> 8, bus->secondary & 0xff); -#else printk(BIOS_DEBUG, "PCI: pci_scan_bus for bus %02x\n", bus->secondary); -#endif /* Maximum sane devfn is 0xFF. */ if (max_devfn > 0xff) { |