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authorYinghai Lu <yinghailu@gmail.com>2005-07-08 02:49:49 +0000
committerYinghai Lu <yinghailu@gmail.com>2005-07-08 02:49:49 +0000
commit13f1c2af8be2cd7f7e99a678f5d428a65b771811 (patch)
tree27cad5581f1fa150f573149d48e82f70ba1b1d9f /src/devices/Config.lb
parent14cde9e96a777f9d75016a13b23fab0480515f58 (diff)
downloadcoreboot-13f1c2af8be2cd7f7e99a678f5d428a65b771811.tar.xz
eric patch
1. x86_setup_mtrr take address bit. 2. generic ht, pcix, pcie beidge... 3. scan bus and reset_bus 4. ht read ctrl to decide if the ht chain is ready 5. Intel e7520 and e7525 support 6. new ich5r support 7. intel sb 6300 support. yhlu patch 1. split x86_setup_mtrrs to fixed and var 2. if (resource->flags & IORESOURCE_FIXED ) return; in device.c pick_largest_resource 3. in_conherent.c K8_SCAN_PCI_BUS git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/devices/Config.lb')
-rw-r--r--src/devices/Config.lb6
1 files changed, 5 insertions, 1 deletions
diff --git a/src/devices/Config.lb b/src/devices/Config.lb
index 8de8d4af32..6ba7472cc7 100644
--- a/src/devices/Config.lb
+++ b/src/devices/Config.lb
@@ -3,8 +3,12 @@ object device.o
object root_device.o
object device_util.o
object pci_device.o
-object pnp_device.o
object hypertransport.o
+object pcix_device.o
+object pciexp_device.o
+object agp_device.o
+object cardbus_device.o
+object pnp_device.o
object pci_ops.o
object smbus_ops.o