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author | Patrick Georgi <patrick.georgi@secunet.com> | 2011-01-13 11:38:46 +0000 |
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committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2011-01-13 11:38:46 +0000 |
commit | 9144304771be6cc89fcd010a0c8bc123bb750cfc (patch) | |
tree | 1ad3642b709324c910e6fffbb677698c6937b189 /src/devices/oprom/yabel/device.c | |
parent | fe7d6b9a4a784f0b92b3c9dc5b6c6070b4c2e10c (diff) | |
download | coreboot-9144304771be6cc89fcd010a0c8bc123bb750cfc.tar.xz |
Improve compatibility of YABEL with real-world VGABIOSes
Some of them do weird things to the option rom region (mapping
registers there or so) which failed as we handled these memory
region in emulation. As they were copied back to real memory
after the emulation was done, we can just as well use real
memory directly for these regions.
This affects IVT, BDA, and option ROM space.
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Joseph Smith <joe@settoplinux.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6251 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/devices/oprom/yabel/device.c')
-rw-r--r-- | src/devices/oprom/yabel/device.c | 25 |
1 files changed, 21 insertions, 4 deletions
diff --git a/src/devices/oprom/yabel/device.c b/src/devices/oprom/yabel/device.c index b48f1d6dee..dd078c72c6 100644 --- a/src/devices/oprom/yabel/device.c +++ b/src/devices/oprom/yabel/device.c @@ -24,8 +24,8 @@ /* the device we are working with... */ biosemu_device_t bios_device; -//max. 6 BARs and 1 Exp.ROM plus CfgSpace and 3 legacy ranges -translate_address_t translate_address_array[11]; +//max. 6 BARs and 1 Exp.ROM plus CfgSpace and 3 legacy ranges, plus 2 "special" memory ranges +translate_address_t translate_address_array[13]; u8 taa_last_entry; typedef struct { @@ -209,6 +209,23 @@ biosemu_dev_get_addr_info(void) } #endif +// "special memory" is a hack to make some parts of memory fall through to real memory +// (ie. no translation). Necessary if option ROMs attempt DMA there, map registers or +// do similarily crazy things. +void +biosemu_add_special_memory(u32 start, u32 size) +{ + int taa_index = ++taa_last_entry; + translate_address_array[taa_index].info = IORESOURCE_FIXED | IORESOURCE_MEM; + translate_address_array[taa_index].bus = 0; + translate_address_array[taa_index].devfn = 0; + translate_address_array[taa_index].cfg_space_offset = 0; + translate_address_array[taa_index].address = start; + translate_address_array[taa_index].size = size; + /* dont translate addresses... all addresses are 1:1 */ + translate_address_array[taa_index].address_offset = 0; +} + #ifndef CONFIG_PCI_OPTION_ROM_RUN_YABEL // to simulate accesses to legacy VGA Memory (0xA0000-0xBFFFF) // we look for the first prefetchable memory BAR, if no prefetchable BAR found, @@ -419,7 +436,7 @@ biosemu_dev_init(struct device * device) // and accessing client interface for every translation... // returns: 0 if addr not found in translate_address_array, 1 if found. u8 -biosemu_dev_translate_address(unsigned long * addr) +biosemu_dev_translate_address(int type, unsigned long * addr) { int i = 0; translate_address_t ta; @@ -443,7 +460,7 @@ biosemu_dev_translate_address(unsigned long * addr) #endif for (i = 0; i <= taa_last_entry; i++) { ta = translate_address_array[i]; - if ((*addr >= ta.address) && (*addr <= (ta.address + ta.size))) { + if ((*addr >= ta.address) && (*addr <= (ta.address + ta.size)) && (ta.info & type)) { *addr += ta.address_offset; return 1; } |