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authorAlex Mauer <hawke@hawkesnest.net>2008-09-10 20:40:46 +0000
committerStefan Reinauer <stepan@openbios.org>2008-09-10 20:40:46 +0000
commit9196dd553dcfdaefec8b4d5c94895175f796ff7b (patch)
tree42672980bec9bab5652bd9e29e0258a9dee6fe5b /src/devices/pci_device.c
parenteb2b8a282c5d08ed1a285c72931aae9e42cf565e (diff)
downloadcoreboot-9196dd553dcfdaefec8b4d5c94895175f796ff7b.tar.xz
Add the "jetway j7f[24]*" mainboard. As compared to the Via Epia CN, this
changes the superio to a Fintek F71805F as described at http://www.coreboot.org/Jetway_J7F2_Build_Tutorial It also creates the mainboard tree for this series of motherboards (Jetway J7F2 and J7F4). I've tested it with one motherboard (J7F2WE1G3), and I believe it works with the others, as the differences among them are mostly trivial (processor speed, chipset and quantity of LAN cards, audio chipset, etc.). A list of the relevant motherboards with specs can be found at http://www.jetway.com.tw/jw/ipcboard_socket.asp?platid=16 The irq_tables.c is copied directly from the epia-cn, because the one generated by getpir with the factory BIOS did not work properly while the EPIA-CN one did. Minor changes on checkin to cope with moved romcc in latest revision. NOTE: This board is broken until the issue introduced in r3567 is resolved. Signed-off-by: Alex Mauer <hawke@hawkesnest.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3571 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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